Major Release of Xilinx ISE Software Slashes FPGA Design Cycles

ISE 9.1i Powered by New SmartCompile Technology Cuts Implementation

Runtimes by Up to 6X and Delivers 30% Faster Performance

Jan 15, 2007, 00:00 ET from Xilinx, Inc.

    SAN JOSE, Calif., Jan. 15 /PRNewswire/ -- Xilinx, Inc. (Nasdaq:   XLNX)
 today introduced its latest 9.1i release of the industry's most widely-used
 Xilinx Integrated Software Environment (ISE(TM)) design suite optimized to
 address today's leading design challenges: timing closure, productivity and
 power. In addition to 2.5X faster runtimes, ISE 9.1i includes new
 SmartCompile technology which improves run times by up to an additional 6X
 while maintaining exact design preservation of unchanged logic. ISE 9.1i
 optimizes the unique ExpressFabric(TM) technology of its latest 65nm
 Virtex(TM)-5 platform, providing an average of 30 percent faster
 performance than competing solutions. For power sensitive applications, ISE
 9.1i also reduces dynamic power by an average of 10 percent.
     (Logo: )
     This revolutionary technology is facilitated by the efforts of the
 Xilinx-Synplicity Ultra High-Capacity Timing Closure Task Force, delivering
 industry-leading productivity enhancing capabilities to ensure the fastest
 path to timing closure and optimize the power and performance of
 leading-edge Xilinx Virtex(TM) Series and Spartan(TM)-3 Generation FPGAs.
     "Fast implementation runtimes and predictable timing results for small
 design changes, especially towards the end of a design cycle, are extremely
 important," said Jochen Frensch, senior technical expert, Graphics
 Platform, at Harmon/Becker Automotive Systems GmbH, a leading provider of
 customized automotive systems. "For small design changes, XST synthesis
 preserved names for unchanged parts of the design and SmartGuide preserved
 close to 99% of the components in implementation, enabling us to see faster
 incremental runtimes. The new SmartGuide technology in ISE 9.1i offers a
 tremendous advantage."
     Increased Productivity
     Much of the time spent on today's most advanced designs is in
 re-implementing the entire design with each incremental change. These
 re-implementations take time and introduce the risk of disrupting portions
 of the design not directly involved with the change. Xilinx SmartCompile
 technology addresses these issues with the following technologies:
     *Partitions:  minimize effects of minor changes late in design cycles with
      cut-and-paste functionality that automatically provides exact
      preservation of existing synthesis, placement and routing of unchanged
      partitions, and reduces time for reimplementation by an average of 2.5X.
     *SmartGuide:  reduces time for re-implementation by an average of 2X for
      small changes by leveraging prior implementation results.
     *SmartPreview:  enables users to pause and resume the place-and-route
      process and save intermediate results to evaluate the state of their
      designs. By previewing implementation information such as routing status
      and timing results, users can make important trade-off decisions without
      waiting for complete implementation to complete.
     SmartCompile technology delivers an order of magnitude increase in
 productivity as a result of up to a 6X run time improvement, exact
 preservation of partitions, and improved visibility into the
 implementation. These improvements are in addition to the 2.5X faster
 runtimes for challenging designs.
     ISE 9.1i also addresses the increasing sophistication of FPGA designers
 with a number of user interface enhancements including:
     *Tcl command console to easily transition from the ISE graphical user
      interface to a command line environment.
     *Source code control compatibility function identifies the files necessary
      to recreate results, which can be imported and exported for source
     Faster Timing Closure
     New features in ISE 9.1i design tools build on capabilities of ISE Fmax
 technology, especially designed to deliver unparalleled performance and
 timing closure results for high density, high performance Virtex-5 based
 designs. The ISE 9.1i integrated timing closure flow incorporates enhanced
 physical synthesis optimizations that provide higher quality of results.
 Optimized routing algorithms provide the most efficient utilization of the
 diagonally symmetric interconnect of the 65nm ExpressFabric technology to
 minimize delay and fully leverage the high performance features of the
 Virtex-5 Platform.
     "Timing closure is the number one issue for FPGA designers, and this
 release greatly simplifies and accelerates that process," said Bruce
 Talley, vice president of the Design Software Division at Xilinx. "Our ISE
 SmartCompile technology addresses the top challenges facing designers
 today, allowing designers to reach their performance goals in much less
 time with fewer, more efficient design iterations. What is just as
 compelling to our users is that ISE 9.1i also enables them to optimize for
 low power design requirements without compromises in overall performance."
     Underlying the entire ISE 9.1i infrastructure is an expanded timing
 closure environment -- a virtual "Timing Closure Cockpit" -- that enables
 intuitive cross-probing between constraint entry, timing analysis,
 floorplanning and report views so designers can more easily analyze timing
 problems. The ISE 9.1i integrated timing closure flow incorporates enhanced
 physical synthesis with improved timing correlation between synthesis and
 placement, resulting in higher quality of results.
     Power Optimization
     New power optimization in Xilinx Synthesis Technology (XST) and
 placement together with improvements in routing deliver an average of 10
 percent lower dynamic power for Spartan-3 Series FPGAs. XST provides
 power-aware logic optimizations for macro processing on blocks such as
 multipliers, adders and BRAMs. Implementation algorithms deploy
 power-efficient placement strategies and lower capacitance nets within the
 device to minimize power without sacrificing performance.
     Pricing and Availability
     ISE Foundation(TM) 9.1i suite is immediately available with prices
 starting at US $2,495. A full-featured 60-day evaluation version is
 available at no charge. All versions of ISE 9.1i software packages support
 Windows(R) 2000 and Windows XP Professional and Linux(R) Red Hat(R)
 Enterprise 3.0 and 4.0. ISE Foundation also supports Solaris(R) 2.8 and
     ISE software delivers programmable logic design solutions to over
 300,000 users worldwide with an intuitive, front-to-back design environment
 for all Xilinx product families, including Virtex-II, Virtex-II Pro,
 Virtex-4 and Virtex-5 Platform FPGAs, Spartan(TM)-3 Generation FPGAs, and
 CoolRunner(TM)-II CPLDs. For more information about the ISE 9.1i software
 suite, visit .
     Additional Customer Feedback
     "Since we use the majority of silicon features offered in Virtex-4 FX,
 including the Power PC, MGTs, Ethernet MACs, DSP48 blocks, FIFOs, and
 SERDES, implementing our design is very challenging," said Alex Henderson,
 CTO, Anagran, a leading network equipment company. "ISE 9.1i makes it very
 easy to meet the timing constraint and reduces the need for manual
 intervention such as floorplanning. Compile times are also reduced with ISE
 9.1i, at times over 35 percent as compared to previous floorplanned
 versions of the design. With the new SmartGuide technology, we've also seen
 further compile time reduction for successive iterations by 30-50 percent.
 We're convinced that ISE 9.1i will allow us to substantially cut our
 engineering time."
     "Our largest Virtex-4 designs use most of the available logic resources
 in the device and can be very challenging for place and route. ISE 9.1i has
 enabled us to reduce implementation compile times by over 4X for these
 challenging designs," said Luc Burgun, CEO, EVE, a leading
 hardware-assisted verification company. "Our development team and our
 customers will realize significant productivity gains with ISE 9.1i."
     About Xilinx
     Xilinx is the worldwide leader in complete programmable logic
 solutions. For more information, visit .

SOURCE Xilinx, Inc.