2014

New EEMBC(R) Scores for NXP's ARM9 LPC3180 Are First to Provide System Designers With Detailed Microcontroller Performance and Energy Information

    EL DORADO HILLS, Calif., June 26 /PRNewswire/ -- New EEMBC(R) benchmark
 scores for the 208-MHz LPC3180 microcontroller from NXP Semiconductors are
 the first to publicly demonstrate detailed performance and energy tradeoffs
 using the EnergyBench(TM) power/energy metric on a microcontroller, and the
 first for any device to directly show the effect of an integrated floating
 point co-processor and instruction cache on device performance and energy
 consumption.
     For the certified scores published today, the ARM9-based LPC3180 MCU
 was pitted against performance benchmarks taken from the EEMBC
 AutoBench(TM) automotive/industrial suite. The suite, which addresses a
 wide range of general-purpose embedded applications, was being tested
 simultaneously for power and energy consumption using EnergyBench, a metric
 that EEMBC implements with a National Instruments data acquisition card and
 LabVIEW interface.
     Four separate benchmark runs were performed to produce scores that
 isolate the contribution of the LPC3180's floating point co-processor and
 instruction cache -- together and individually -- to device performance,
 average power consumption, and energy consumption.
     "These NXP LPC3180 scores are highly significant not only for the
 novelty of the test conditions, but also insofar as they provide a clear
 validation of EEMBC's approach to power and energy consumption
 measurement," said EEMBC President Markus Levy.
     As expected, when the floating point and instruction cache functions
 are enabled, the EEMBC score data for the LPC3180 microcontroller shows an
 increase in performance. Furthermore, the absolute energy required to
 execute the performance benchmarks decreases by as much as an order of
 magnitude under the same conditions. However, it was unexpected that the
 average power also decreased, despite enabling the floating point and
 instruction cache functions. In addition, average power also varied by as
 much as 11 percent based on the benchmark workload that was applied.
     "The results for the LPC3180 microcontroller underscore that power and
 energy are two quite different concepts," Levy added. "They also show that
 'typical power,' a number often provided on CPU datasheets, is a poor
 indicator of how much energy a device will actually require to perform a
 specific workload. The take-away for design engineers is the importance of
 looking at the whole picture when considering tradeoffs between
 performance, power, and energy."
     NXP Semiconductors' 32-bit LPC3180 is the industry's first 90-nm
 ARM9-based microcontroller and the first such device to provide a vector
 floating-point co-processor, integrated USB On-The-Go, and operation down
 to 0.9 V. Its target applications include point-of-sale (POS) equipment,
 medical and industrial devices, global positioning systems (GPS), and
 robotics. Additional LPC3180 peripherals include 7 UARTs, SPI, I2C, a
 real-time clock with a separate power domain, NAND Flash, and DDR memory
 controllers.
     "The EEMBC benchmarks allow us to credibly demonstrate the real value
 of the performance and energy-related features of our LPC3180
 microcontroller," said Geoff Lees, general manager of the Microcontroller
 Product Line at NXP Semiconductors. "Furthermore, as shown from the
 benchmark data that we've published, we believe our customers benefit from
 seeing a wide range of performance and energy values to enable them to make
 more educated decisions in their designs."
     The certified EEMBC performance and EnergyBench scores for the NXP
 LPC3180 microcontroller provide data on performance and energy consumption
 for 11 benchmark kernels from the AutoBench suite. The wide range of
 applications in the suite include angle-to-time conversion, basic floating
 point, bit manipulation, CAN, infinite impulse response filter, inverse
 discrete cosine transform, pointer chasing, pulse width modulation, road
 speed calculation, and table lookup and interpolation. Complete details of
 the results are available for free at http://www.eembc.org.
     About EEMBC
     EEMBC, the Embedded Microprocessor Benchmark Consortium, develops and
 certifies real-world benchmarks and benchmark scores to help designers
 select the right embedded processors for their systems. Every processor
 submitted for EEMBC benchmarking is tested for parameters representing
 different workloads and capabilities in communications, networking,
 consumer, office automation, automotive/industrial, embedded Java, and
 network storage-related applications. With members including leading
 semiconductor, intellectual property, and compiler companies, EEMBC
 establishes benchmark standards and provides certified benchmarking results
 through the EEMBC Technology Center.
     EEMBC's members include Adaptec, Altera, AMD, Analog Devices, ARC
 International, ARM, Artifex Software, Broadcom, Cavium Networks, CEVA, Code
 Sourcery, esmertec, Freescale Semiconductor, Fujitsu Microelectronics,
 Green Hills Software, IAR Systems AB, IBM, Imagination Technologies, Improv
 Systems, Infineon Technologies, Intel, LSI Logic, Marvell Semiconductor,
 Matsushita Electric Industrial, Mentor Graphics, Microchip Technology, MIPS
 Technologies, National Instruments, NEC Electronics, Netcleus Systems,
 Nokia, NXP Semiconductors, Oki Electric Industry Co, PA Semi, Qualcomm,
 Realtek Semiconductor, Red Hat, Renesas Technology, Sony Computer
 Entertainment, STMicroelectronics, Sun Microsystems, Tensilica, Texas
 Instruments, Toshiba, VIA Technologies, and Wind River Systems.
     AutoBench and EnergyBench are trademarks and EEMBC is a registered
 trademark of the Embedded Microprocessor Benchmark Consortium. All other
 trademarks appearing herein are the property of their respective owners.
 
 

SOURCE EEMBC

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