Synopsys Releases Proven VMM Methodology Standard Library and Applications Under Apache Open Source License

VMM Available for Free Download from New 'VMM Central' Web Site

May 28, 2008, 01:00 ET from Synopsys, Inc.

    MOUNTAIN VIEW, Calif., May 28 /PRNewswire-FirstCall/ -- Synopsys, Inc.
 (Nasdaq:   SNPS), a world leader in software and IP for semiconductor design
 and manufacturing, today announced it has released the source code for its
 complete implementation of the proven VMM verification methodology for
 SystemVerilog, including the VMM Standard Library and VMM Applications,
 under the popular Apache 2.0 open source license. Synopsys' implementation
 of the VMM methodology, originally defined in the Verification Methodology
 Manual for SystemVerilog, was recently donated to the Accellera standards
 organization to speed development of verification interoperability
 standards. By releasing its implementation of the VMM methodology, Synopsys
 has enabled users and vendors from across the industry to take immediate
 advantage of the years of investment in VMM methodology development as
 Accellera begins its standardization efforts. Synopsys' complete
 implementation of the VMM methodology is available as a free download at
     "With the daunting complexity of today's SoCs and their associated
 testbenches, it's increasingly important that development teams deploy
 re-usable Verification IP that is designed to interoperate at the SoC
 level," said Paul Tobin, director of AMD's Verification Center of
 Expertise. "Synopsys' open sourcing of VMM and its donation to Accellera
 for consideration by the VIP technical subcommittee are positive steps
 towards the standardization and open interoperability between EDA tools
 that users need."
     "By releasing its VMM implementation under the Apache license, Synopsys
 is inviting the entire industry to use the same proven methodology
 successfully deployed on hundreds of projects around the world," said Manoj
 Gandhi, senior vice president and general manager of the Verification Group
 at Synopsys. "This move supports Accellera's verification interoperability
 objectives by enabling users to more easily share VMM environments and
 components as Accellera develops a verification interoperability standard."
     Download, Learn and Participate at VMM Central
     VMM Central is a comprehensive online resource for designers using the
 VMM methodology. Synopsys' complete implementation of VMM, which is
 available for free download at includes:
-- VMM Standard Library -- VMM Register Abstraction Layer application -- VMM Reusable Environment Composition application -- VMM Memory Allocation Manager application -- VMM Hardware Abstraction Layer application -- VMM Data Stream Scoreboard application -- VMM Macro Library A variety of other resources are also available at VMM Central to help improve productivity for both new and existing VMM users, such as:
-- Documentation for the VMM Standard Library and VMM Applications -- VMM utilities, including RALGEN and VMMGEN, for rapid environment development -- Example VMM environments -- HVP verification planning language specification -- User papers and technical articles -- VMM user discussion forum -- "Verification Martial Arts" blog by Janick Bergeron, Synopsys fellow and co-author of the Verification Methodology Manual for SystemVerilog Proven and Trusted VMM Methodology The VMM methodology has been successfully deployed by hundreds of project teams across the globe since its release in 2005, and over 50 technical papers and tutorials on the VMM methodology have been presented at Synopsys Users Group (SNUG(R)) meetings and other venues. Companies that have used VMM to address their verification challenges and/or have contributed to VMM include: Alacritech, AMD, Analog Devices, ARM, Axis Communication, Broadcom, Commex Technologies, CreVinn Teoranta, Denali, Emulex, Enterasys Networks, Ericsson, Faraday Technology, Fore River Group, General Dynamics, HCL Technologies, HiSilicon Technologies, Innovative Logic, Integrated Device Technology, Intellon, ITT Corporation, Jen2, LOA Technologies, Mindtree Consulting, Neterion, NextIO, OKI Network LSI, Patni, Ross Video, Silicon Logic Engineering, Solarflare Communications, STARC, Sun Microsystems, SyoSil, Tego, Texas Instruments, Transnoma Medical, Transwitch India, Verivue, Virident Systems, Wavesat Telecom, Wipro Technologies, and more. VMM Ecosystem Based on Broad Vendor Support A large number of EDA suppliers, consultants, and training organizations throughout the industry are able to leverage VMM technology and expertise to create tools, verification IP (VIP), training, and services for chip development teams through the VMM Catalyst Program. More than 60 companies are currently members of the VMM Catalyst program, including: Aldec, Avery Design Systems, Blue Pearl Software, Bluespec, Callidus Systems, Certess, ChipRight, Computer Based Education, Contemporary Verification Consultants, Doulos, eInfochips, EVE, JEDA Technologies, Kacper Technologies, Krispan, Masamb Electronics Systems, Mimasic, NoBug, Novas Software, nSys Design Systems, Paradigm Works, Perfectus Technology, Productivity Design Tools, Silicomotive Solutions, Silicon Interfaces, Star-Mountain, Sunburst Design, Sutherland HDL, Synterix, ThurstIC, TransEDA, UV-Tech Consulting & Training, VeriEZ Solutions, Verific Design Automation, Verification Central, Verifore, VeriSure Digital, Winterlogic, XtremeEDA, Zocalo Tech, and more. VMM User Forum at DAC Synopsys is sponsoring a VMM User Forum luncheon at the Design Automation Conference (DAC) in Anaheim, Calif. on June 10, 2008. Join Synopsys and VMM users to explore how VMM has extended methodology beyond base classes. For more information and to register, please visit The VMM methodology will also be featured in Synopsys' main booth at DAC (booth # 1349) and in the Synopsys Standards Booth at DAC (booth # 1541). About Synopsys Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at Synopsys and SNUG are registered trademarks or trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
Editorial Contact: Sheryl Gulizia Synopsys, Inc. 650-584-8635 Stephen Brennan MCA, Inc. 650-968-8900x114

SOURCE Synopsys, Inc.