Tektronix Introduces Real-time Compliance Analyzer for DDR4, DDR3 and DDR3L Memory MCA4000 Provides Instantaneous Visibility into Memory Interfaces Over Long Analysis Runs for Deep insight into Memory Bus Activity
BEAVERTON, Ore., Oct. 22, 2013 /PRNewswire/ -- Tektronix, Inc., a leading worldwide provider of test, measurement and monitoring instrumentation, today announced the availability of real-time memory execution validation capabilities for faster protocol, performance and compliance analysis of JEDEC DDR4, DDR3 and DDR3L memory standards. The MCA4000 protocol compliance and bus protocol analyzer developed by Nexus Technology, a Tektronix partner for memory solutions, provides instantaneous observability of memory interfaces over long periods of time, providing deep insight into memory bus activity that can help to shorten debug cycles and speed time to market.
As the industry transitions to new memory technologies like DDR4 and DDR3L with higher data rate, lower power consumption and greater capacity, designers face new challenges to validate and debug devices with tighter margins, faster edge rates and complex bus protocols. With the addition of real-time execution validation capabilities, Tektronix meets these demanding requirements with the industry's most complete memory analysis portfolio, which includes existing solutions for electrical test and logic debug along with a broad family of probes, interposers and software analysis capabilities.
"The latest JEDEC standards make memory validation and debug a far tougher and more demanding task than it has ever been in the past," said Brian Reich, general manager, Performance Oscilloscopes, Tektronix. "Execution validation completes our portfolio to give customers the broad range of test solutions they need to quickly isolate problems and debug all types of memory regardless of speed or form factor."
The MCA4000 memory compliance analyzer features a dual architecture that enables the detection of protocol violations coupled with the ability to acquire and analyze violations and determine bus performance. The MCA4000 has an integrated protocol analyzer that monitors a DDR memory bus at-speed, reporting statistical results on events and violations in real-time. It also has an integrated, full function logic analyzer with 1G cycle acquisition depth.
The instrument incorporates a fully programmable front-end that provides the ability to generate oscilloscope-like eye diagrams to graphically illustrate DDR PHY settings, bus integrity and required sample points. The Tektronix family of probes and interposers are shared between Tektronix 7000 series logic analyzers and the MCA4000, providing the ability to view high speed timing, state, protocol and real-time analysis data simultaneously with one single load.
The MCA4000 is available now worldwide. Please contact your local sales representative for pricing details.
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SOURCE Tektronix, Inc.