Ceva Unveils Next-Generation NeuPro NPU Portfolio and Announces Expansion into AI Infrastructure
A common architecture and unified software stack span Physical AI applications from always-on sensors to AI infrastructure, delivering up to 2X higher AI throughput per mm² and 50% better energy efficiency for the latest multimodal, generative and agentic AI workloads
ROCKVILLE, Md., Oct. 28, 2026 /PRNewswire/ -- Ceva, Inc. (NASDAQ: CEVA), the leading licensor of silicon and software IP that powers the Smart Edge, today unveiled its next-generation NeuPro™ NPU portfolio, featuring expanded capabilities and delivering up to 2X higher AI throughput per mm² and a 50% improvement in energy efficiency versus the first generation.
Built on a common architecture and unified software stack, the new portfolio is designed to support increasingly demanding multimodal, generative and agentic AI workloads across Physical AI applications, from always-on sensing to advanced edge systems. The new architecture also marks Ceva's expansion into AI infrastructure, enabling intelligent memory, connectivity and data-processing silicon, as well as custom AI inference processors for cloud and data centers.
Physical AI systems increasingly rely on multiple AI models and intelligent agents working together, with perception and real-time responses close to the sensor and more complex reasoning and orchestration distributed across devices, edge systems and the cloud. This shift toward hybrid AI is accelerating. Yet wherever inference takes place, a common challenge remains: the power and performance cost of the compute itself and of moving data to and from it. At the sensor, that cost is measured in microwatts and square millimeters; in the data center, in megawatts and memory bandwidth. The same constraint appears in different forms, which calls for neural processing optimized for each workload, supported by a common architecture and software environment.
The next-generation NeuPro portfolio addresses both: a range of engines sized for different points in the system, and one way to develop for all of them. A unified software development kit spans the portfolio so semiconductor designers can match an engine to each part of their system or combine several within one SoC while preserving their software investment.
"Working closely with the more than 15 customers who have licensed the first generation of NeuPro has shown us that successful AI products depend on the right balance of compute, memory, bandwidth, power and cost for each use case," said Yaron Galitzky, Executive Vice President, AI Division at Ceva. "Our team designed this next generation around those lessons, giving customers more room to deploy demanding models today and prepare for the workloads ahead."
Built for the Next Generation of Inference
Peak compute alone no longer defines AI system performance. Semiconductor developers must deliver optimal inference throughput within demanding power, area and memory constraints, while ensuring their architectures can support new models throughout the product lifecycle. The next-generation NeuPro architecture is designed to address both challenges.
The architecture introduces capabilities for workloads ranging from perception and classification to transformer-based, multimodal, generative and agentic workloads, including Physical AI applications:
- Up to 2X higher AI throughput per mm² and a 50% improvement in energy efficiency versus the first generation.
- Advanced AI numerics and mixed precision, including FP4 and FP8, improving inference efficiency while reducing memory and data-movement requirements.
- Higher memory bandwidth and advanced memory management, including dynamic shapes and paged KV cache, addressing longer contexts and memory-intensive transformer workloads.
- Higher multiply-accumulate (MAC) utilization through optimized tensor reshaping, maximizing the effective use of compute resources to improve inference performance.
- Support for the latest network architectures, including Mixture-of-Experts and linear attention, with the architectural flexibility to accommodate model types that have not yet emerged.
- Support for pre-quantized models, allowing customers to deploy published checkpoints without a separate quantization and calibration step.
- Advanced compression, quantization and pruning, reducing computation and data movement to improve effective performance per watt and per unit area.
A Portfolio for Different Inference Workloads
The next-generation NeuPro portfolio comprises four NPUs:
- NeuPro Nano targets always-on sensing and entry-level perception in highly constrained devices.
- NeuPro Prime addresses mainstream CNN and transformer workloads.
- NeuPro Max scales to advanced edge AI, including high-resolution perception, multimodal models, on-device assistants, robotics, Physical AI and agentic AI.
- NeuPro Ultra targets AI infrastructure applications, supporting both complex large language model inference in cloud and data centers and intelligent memory, connectivity and data-processing silicon that improves overall AI system efficiency.
All four are built on a common core architecture and supported by a single unified SDK, so tools, development flow and software investment carry across the portfolio. Designers can move between cores as requirements change, or combine several within one SoC and assign each workload to the engine best suited to it. For semiconductor companies, that means addressing multiple AI markets and performance points from one development foundation, reducing integration complexity and shortening development across successive product generations.
Extending Neural Processing into AI Infrastructure
As large language model inference runs into memory constraints, customers are redesigning data center systems, distributing compute differently across them and integrating it in places it has not previously been, including within memory and networking subsystems. Inference at scale serves many models and many users at once, and memory bandwidth and data movement between memory, compute and networks have become central to system performance and power efficiency. ABI Research forecasts cloud AI inference capacity to grow at a 42% CAGR through 2035(i).
NeuPro Ultra is built for that redesign. It supports complex large language models in cloud and data center inference, with multi-core processing, multi-user operation, high memory bandwidth and advanced memory management, together with support for the software frameworks used in those deployments. It can equally be integrated into memory and connectivity subsystems of the same system, applying neural processing to the movement of data rather than to the model itself, reducing unnecessary transfers and relieving bottlenecks closer to where data is stored. Silicon developers can add these capabilities using Ceva's licensable NPU foundation and the same software stack used across the portfolio.
"A common NPU architecture and software stack across every class of AI workload lets our customers build once and deploy across their roadmap," said Amir Panush, Chief Executive Officer of Ceva. "NeuPro Ultra brings that platform into AI infrastructure, an important step in Ceva's strategy to put neural processing into a broader range of semiconductor products. Customers building silicon for these markets can draw on Ceva's architecture, software and experience rather than developing an NPU platform from scratch."
Ceva will discuss the next-generation NeuPro portfolio and its Physical AI strategy in more detail at its technology symposium events in Hsinchu, Taiwan, on November 2 and in Shanghai, China, on November 5. To learn more about these events and to register to attend, visit https://www.ceva-ip.com/symposium-2026/.
Availability
Leading semiconductor and system companies are already evaluating and integrating next-generation NeuPro technology for future AI products. These early engagements span multiple market segments and help shape deployments targeting advanced edge, Physical AI and AI infrastructure applications. The next-generation NeuPro architecture is available now to select early-access customers, with general availability planned for the second quarter of 2027.
About Ceva, Inc.
Ceva powers the Smart Edge, bridging the digital and physical worlds to bring AI-driven products to life. Our Ceva AI fabric portfolio of silicon and software IP enables devices to Connect, Sense, and Infer – the essential capabilities for the intelligent edge. From 5G, cellular IoT, Bluetooth, Wi-Fi, and UWB connectivity to scalable Edge AI NPUs, AI DSPs, sensor fusion processors and embedded software, Ceva provides the foundational IP for devices that connect, understand their environment, and act in real time.
With more than 22 billion devices shipped and trusted by 400+ customers worldwide, Ceva is the backbone of today's most advanced smart edge products - from AI-infused wearables and IoT devices to autonomous vehicles and 5G infrastructure. Our differentiated solutions deliver seamless integration into existing design flows, total flexibility to combine solutions based on design needs and ultra‑low‑power performance in minimal silicon footprint, helping customers accelerate development, reduce risk, and bring innovative products to market faster. As technology evolves toward Physical AI, Ceva's IP portfolio lays the foundation for systems that are always connected, contextually aware, and capable of intelligent, real-time decision-making.
Visit us at www.ceva-ip.com and follow us on LinkedIn, X, YouTube, Facebook, and Instagram.
SOURCE Ceva, Inc.
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