MIPS Partners With Mobileye to Accelerate Next Generation Autonomous Driving Technologies and Advanced Driver Assistance Systems

Mobileye Adopts New MIPS eVocore RISC-V CPUs; RISC-V Architecture to Help Drive Future of Vehicle Safety

SAN JOSE, Calif. , Dec. 12, 2022 /PRNewswire/ -- MIPS, a leading developer of highly scalable RISC processor IP, announced it is continuing its partnership with Mobileye, in accelerating innovation in autonomous driving technologies and advanced driver-assistance systems (ADAS).

As part of the companies' long-term relationship, Mobileye has licensed new MIPS' eVocore P8700 multiprocessors in its latest generation of System on a Chip (SoC) for ADAS and autonomous vehicle, the next-generation EyeQ SoCs. 

"Mobileye's highly efficient, scalable and proven EyeQ® SoCs are driving a revolution in driver assistance and autonomous vehicle technologies. The new MIPS eVocore CPUs provide not only the unrivaled combination of performance and efficiency that MIPS is known for, but also the differentiation of an open software development environment," said Elchanan Rushinek, Executive Vice President of Engineering, Mobileye, whose technology is used by multiple car makers.

MIPS new eVocore P8700 multiprocessor IP cores, which include best-in-class power efficiency for use in SoC applications, are the first MIPS products based on the RISC-V open instruction set architecture (ISA).  The P8700 combines a deep pipeline with multi-issue Out-of-Order (OOO) execution and multi-threading to deliver outstanding computational throughput. It has single-threaded performance greater than what is currently available in other RISC-V CPU IP offerings. The high level of scalability of the cores makes them well suited for compute-intensive tasks across a broad range of markets and applications such as automotive.

"We believe that RISC-V will become a major solution for the automotive market, providing easy porting process for running 3^rd party software on devices such as Mobileye's next-generation EyeQ SoC", said Calista Redmond, CEO of RISC-V International.

Mobileye is using MIPS' processors in several of the EyeQ® generations, starting with the EyeQ2, including EyeQ6H, EyeQ6L and now the next-generation EyeQ. The support for CPU's and accelerators coherency, assisted with the growth needed to support higher performance systems, going from a single camera system to multiple cameras together with multiple sensors. The ADAS technology have become ubiquitous in all cars trims levels, when new comfort features are driving ADAS to provide L2+/L3/L4 capabilities. Autonomous vehicles are expected to initially be roll-out in segments as public transportation and delivery services, when the next-generation EyeQ can help to reduce the cost and complexity of such systems, providing AV-on-a-Chip solution. According to Strategic Market Research report, the ADAS market is expected to increase from USD $23.4 billion  in 2021 to USD $75.2 billion by 2030.

"MIPS' unique real-time features, hardware virtualization, functional safety and security technologies can provide clear advantages for companies delivering innovative solutions in areas such as autonomous vehicles. Having autonomous cars based on the RISC-V ISA and Linux open software is a great achievement, as open source are more robust and hence provide a safer platform for the car," said Desi Banatao, MIPS CEO. "Mobileye is a pioneer in advanced driver assistance systems and is an innovator in autonomous vehicles, and we are thrilled to continue our long-time partnership in driving the future of next-generation chips for autonomous vehicles."

MIPS is a leading developer of highly scalable RISC processor IP for high-end automotive, computing and communications applications. With its deep engineering expertise built over 35 years and billions of MIPS-based chips shipped to-date, today the company is accelerating RISC-V innovation for a new era of heterogeneous processing. The company's proven solutions are uniquely configurable, enabling semiconductor companies to hit exacting performance and power requirements and differentiate their devices. Visit: www.mips.com.

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SOURCE MIPS