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HUAWEI stellt Tau-Skalierungsgesetz für zukünftige Chips vor
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News provided by

China Daily

May 28, 2026, 19:54 ET

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BEIJING, 29. Mai 2026 /PRNewswire/ -- Ein Nachrichtenbericht von China Daily:

Am Montag stellte He Tingbo, Präsidentin der Halbleiterabteilung von HUAWEI, auf dem 2026 IEEE International Symposium on Circuits and Systems in Shanghai das Tau (τ)-Skalierungsgesetz vor, einen Nachfolger des Mooreschen Gesetzes zur Steuerung der Halbleiterentwicklung.

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He Tingbo delivers a keynote speech at the 2026 IEEE International Symposium on Circuits and Systems in Shanghai on Monday.
He Tingbo delivers a keynote speech at the 2026 IEEE International Symposium on Circuits and Systems in Shanghai on Monday.

Das neue Prinzip ersetzt die traditionelle geometrische Transistor-Skalierung durch die Zeitskalierung als zentrales Maß für den Fortschritt. Das Tau-Skalierungsgesetz verringert die Signalausbreitungsverzögerung und die Systemausführungszeit, um Leistung, Energieeffizienz und Transistordichte zu verbessern.

Jahrzehntelang verließ sich die Halbleiterindustrie auf die Verkleinerung der Transistoren, um die Rechenleistung zu erhöhen und die Kosten zu senken. Die weitere Skalierung ist jedoch zunehmend schwieriger geworden, während sich der Anstieg der Kosten pro Transistor und der Leistung verlangsamt hat.

Laut He bietet das Tau-Skalierungsgesetz einen alternativen Weg für die Halbleiterentwicklung, wobei HUAWEI Technologien wie LogicFolding und einen mehrstufigen Optimierungsrahmen entwickelt, der Bauelemente, Schaltungen, Chips und Systeme umfasst.

Ziel des Unternehmens ist es, den Transistor- und Verbindungswiderstand sowie die parasitäre Kapazität zu verringern, um die Verzögerung auf der physikalischen Ebene zu minimieren. Auf der Schaltungsebene restrukturiert die LogicFolding-Architektur Layouts, um kritische Signalpfade zu verkürzen und so resistive und kapazitive Lasten zu reduzieren und gleichzeitig die Transistordichte und die Schaltungsleistung zu verbessern.

Auf Chipebene wendet HUAWEI ein koordiniertes Software-, Architektur- und Siliziumdesign an, um den Befehls- und Datenfluss zu optimieren, die Parallelität zu erhöhen und die End-to-End-Ausführungszeit zu reduzieren. Auf Systemebene ermöglicht das UnifiedBus-Verbindungsprotokoll des Unternehmens eine einheitliche Speicheradressierung und native Speichersemantik für SuperPods, wodurch die Kommunikationslatenz in großen Computersystemen verringert wird.

Er sagte, HUAWEI habe das Tau-Skalierungsgesetz auf Smartphones und KI-Computing angewendet. In den vergangenen sechs Jahren hat das Unternehmen 381 Chips auf der Grundlage des neuen Frameworks für verschiedene Branchen und Märkte entwickelt und in Serie produziert.

HUAWEI enthüllte auch, dass seine Kirin-Prozessoren, die im Herbst 2026 auf den Markt kommen sollen, die ersten Chips sein werden, die die LogicFolding-Architektur verwenden, die die Chipleistung erheblich verbessern wird.

Das Tau-Scaling-Gesetz wird von Peers und ihren Kollegen auch als „Gesetz von He" bezeichnet, benannt nach He Tingbo.

HUAWEI geht davon aus, dass seine High-End-Chips, die im Rahmen der Tau-Skalierung entwickelt werden, bis 2031 Transistordichten erreichen könnten, die mit 14-Angström (1,4 nm)-Prozesstechnologien vergleichbar sind.

Abschließend betonte er, dass die Zusammenarbeit für den künftigen Fortschritt von entscheidender Bedeutung ist, da kein Unternehmen die Herausforderungen der Halbleiterentwicklung allein lösen kann.

Foto – https://mma.prnewswire.com/media/2988499/He_Tingbo_delivers_a_keynote_speech_at_the_2026_IEEE_International_Symposium_on_Circuits_and_Systems.jpg

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