Pearl Semiconductor SpurFree™ Technology Paves Way for Ultra-Low Noise Timing Solutions for Data Center Connectivity

Technology Demo to be Held at Electronica 2022

CAIRO, Nov. 2, 2022 /PRNewswire/ -- High-performance timing company Pearl Semiconductor announced a patented all-digital PLL technology for ultra-low-noise timing solutions. Pearl's "SpurFree" architecture is a critical necessity in timing solutions for next-generation connectivity standards that will handle increasing data flow within and between data centers, including optical transmission networks and 5G backhaul. The patented technology, enabled by a DSP engine, will be demonstrated at Electronica 2022 in Munich, Nov. 15-18.

The SpurFree technology is designed to solve the problem of fractional "spurs" created by phase locked loops (PLLs)—electronic noise that can create signal interference.  The technology has already been validated in silicon, yielding a programmable any-rate reference clock with sub-75 femtosecond performance, with frequencies up to 3GHz. The performance competes with best-in-class timing products on the market today. The technology is the foundation for building a full-breadth line of products, including a range of programmable reference clocks, multi-output clock generators, clock buffers, jitter attenuators and network synchronizers.

"This family of new high-performance devices will serve the rapidly expanding market of next-generation data centers, which are seeing 20% growth," said Mostafa Elkhouly, vice president of Marketing and Business Development, Pearl Semiconductor. "These data center providers are demanding higher throughput, and Pearl's any-frequency PLL has a second-to-none noise performance that can now help critical equipment OEMs keep pace with next-generation data center connectivity and optical networks. We are seeking strategic partners for collaboration on new product development and are ready to provide demo boards."

With the growing importance of cloud computing and storage, and with 5G driving greater network density, the global market is seeing a surge in demand for high-frequency data connectivity that in turn requires ultra-low noise and programmability.

Currently, high-frequency low-noise reference clocks are mostly developed using quartz SAW devices that are bulky and lack programmability. Only a handful of semiconductor players provide truly programmable low-noise high-frequency reference clocks and timing products. There is strong pressure on all timing products providers to develop new technologies that meet such unprecedented noise and programmability requirements.

"The vast number of new applications requiring high-throughput connectivity is staggering -- the growth of 5G alone is predicted to hit trillions of dollars by 2030," said Ayman Ahmed, CEO, Pearl Semiconductor. "The performance we are already achieving is only a start – we see a clear path to improvement that will yield unprecedented performance. With our track record of innovation and robust performance we expect to be the leading timing solution provider for data center connectivity worldwide."

Pearl will demonstrate its technology at Electronica 2022 in Hall C2, Booth 565 from Nov 15^th to Nov 18^th in Munich, Germany. To set up a demo meeting, please contact [email protected].

Pearl Semiconductor is a fabless semiconductor company specializing in high-performance reference clocks and timing ICs. Its products are based on innovative manufacturing and patented IC design technologies achieving outstanding performance. Pearl Semiconductor aims to be the leading supplier of high-performance reference clocks and timing ICs serving the most demanding industrial, networking, telecom, and automotive applications.

http://www.pearlsemi.com

For more information contact:

Tom Breunig
Helios Communications
510.847.1637
[email protected]

SOURCE Pearl Semiconductor