SAN JOSE, Calif., Oct. 30, 2015 /PRNewswire/ -- Altera Corporation (NASDAQ: ALTR) is demonstrating how its field programmable gate arrays (FPGAs) can enable system acceleration in trading and regulatory environments at the FIA Futures & Options Expo taking place November 3-5, 2015, at the Chicago Hilton (Green Hall, Booth #107). This industry event focuses on the technology requirements and critical issues associated with the financial derivatives market. Altera, along with partner REFLEX CES, is showcasing ultra-low latency networking and acceleration of 10 Gigabit Ethernet (10GbE) using an Arria® 10 FPGA, which enables tremendous performance potential.
Demonstrations at the Altera booth include the following:
- An ultra-low latency networking demonstration from REFLEX CES, a provider of networking accelerator cards, featuring an Arria 10 FPGA driving two Quad Small Form-factor Pluggable (QSFP) hot-pluggable transceiver connections demonstrating:
- Real-time 10GbE communication with a COTS NIC (commercial-off-the-shelf network interface card)
- Real-time measurement of 10GbE ultra low latency in a system
- Demonstration of an OpenCL™ flow on an Arria 10 FPGA using the Altera SDK for OpenCL™ design tool running a Mandelbrot algorithm, video downscaling, and other applications.
Altera FPGAs Serve as Coprocessors Altera FPGAs support pipeline structures of variable depth and provide parallel compute resources numbering in the thousands, allowing even highly complex functions to be implemented with single-clock execution. The programmability of FPGAs ensures they can be tuned to meet the specific needs of an application without the cost or delay of designing a custom coprocessor. FPGAs are reprogrammable and therefore can provide highly customized coprocessing in a single chip for a wide range of applications.
Altera also offers the industry's first implementation of IEEE 754 single-precision hardened floating point operators in the DSP (digital signal processing) blocks in its Arria 10 FPGAs, enabling a processing rate of up to 1.5 TFLOPS (Tera floating point operations per second) offering greater energy efficiency and productivity for financial, big data, search and other applications. With this innovation, Altera FPGAs and SoCs offer a performance and power efficiency advantage over microprocessors and GPUs (graphics processing units) in an expanded range of applications.
REFLEX CES provides ultra-low latency FPGA network accelerator cards delivered with a comprehensive firmware/software design environment and designed to enable easy implementation of ultra-low latency network data processing and high-performance computing inside the FPGA. REFLEX CES also provides OpenCL board support packages (BSPs) optimized for Arria10 FPGAs.
About Altera Computer and Storage Solutions Altera FPGAs can be used to accelerate the performance of large-scale data systems. Altera FPGAs enable higher speed data processing by providing customized high-bandwidth, low-latency connections to network and storage systems. In addition, Altera FPGAs provide compression, data filtering, and algorithmic acceleration.
With the Altera SDK for OpenCL, system designers can rapidly develop acceleration solutions for computer and storage systems. The Altera SDK for OpenCL enables even software developers to easily design with FPGAs by allowing them to utilize a high-level programming language for developing acceleration functions.
Altera® programmable solutions enable designers of electronic systems to rapidly and cost effectively innovate, differentiate and win in their markets. Altera offers FPGA, SoC, CPLD, and complementary technologies, such as power solutions to provide high-value solutions to customers worldwide. Visit Altera at www.altera.com.
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Editor Contact: Karin Taylor Altera Corporation (408) 544-8207 email@example.com
SOURCE Altera Corporation