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Best of West Finalist, MonolithIC 3D, Inc., Announces Multiple 3D IC Technologies at SemiconWest


News provided by

MonolithIC 3D, Inc.

Jul 08, 2011, 01:00 ET

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SAN JOSE, Calif., July 8, 2011 /PRNewswire/ -- MonolithIC 3D, Inc., the innovator of practical monolithic 3D IC technology, has unveiled multiple 3D IC technologies that now cover most mainstream semiconductor device types. Besides logic structures, these monolithic 3D technologies include DRAM, NAND Flash and RRAM memory types, FPGA and gate arrays, as well as methods of fabricating image sensors and micro-displays. With this broad portfolio of 3D IC technologies, MonolithIC 3D enables the next generation of performance and power improvements that compete with scaling without requiring the risks and high costs of next generation lithography. Brief technical disclosures and brochures of all 10 monolithic 3D technologies are available at <http://www.monolithic3d.com/semicon-west-brochure.html> and at the SemiconWest show, North Hall booth #5585.

"We are delighted that the MonolithIC 3D, Inc. technology has been chosen by the semiconductor community as a Finalist for the Best of West Award at the upcoming SemiconWest 2011 industry show," stated Zvi Or-Bach, MonolithIC 3D's founder and CEO.  "We firmly believe our technology provides an attractive path for the industry to continue along Moore's Law for the next two decades."  Best of West finalists are selected by a distinguished panel of semiconductor experts based on their financial impact on the industry, engineering or scientific achievement, and/or societal impact.

"Further feature size scaling will be difficult and will not provide as much benefit as before. Monolithic 3D IC techniques are required to keep Moore's Law valid. Monolithic 3D is the future," noted Professor Fabian Pease, Stanford's William E. Ayer Professor of Electrical Engineering (emeritus) and member of the National Academy of Engineering.  "Current packaging-oriented 3D IC approaches still have many issues, and if solved, will still not provide a significant cost per function reduction," Pease continued.  "To reduce the cost of the circuit in the manner of Moore's Law, we need a monolithic approach.  MonolithIC 3D, Inc. is onto something really big."

"The industry is using double patterning lithography today and is concerned with the prospect of using costlier and riskier technologies such as quad patterning and EUV lithography for future generations," noted MonolithIC 3D, Inc.'s VP of Technology Brian Cronquist.  "These and other costs related to scaling down have shrunk the available number of logic wafer fabs in the world from over 20 at 130nm to a projected less than 5 at the 20nm node (IHS iSuppli Jan 2011).  Monolithic 3D technology provides an attractive alternative and will empower older generation fabs to compete with the leading edge."

MonolithIC 3D, Inc., is an IP company dedicated to innovation in semiconductor design and fabrication. The company's patented 3D technologies offer chipmakers an economical, practical way to create monolithically integrated three-dimensional circuits.  The company's concepts have the potential to maintain or increase device speed and lower power requirements for a given node, while avoiding the need for continuous (and very costly) dimensional scaling that has been the basis for "Moore's Law."  More information about the company, including detailed technical information, can be found at www.monolithic3D.com.

Contact:

Charles Lewis (PR),

[email protected],

408-348-9045


Brian Cronquist,

[email protected],

408-839-9533

SOURCE MonolithIC 3D, Inc.

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