NEW YORK, April 15, 2013 /PRNewswire/ -- Reportlinker.com announces that a new market research report is available in its catalogue:
Over the next five years, an incredible 3x wafer growth is expected for the Flip-Chip platform, which will reach 40M+ of 12''eq wspy by 2018!
Despite its high 19% CAGR, Flip-chip is not new - in fact, it was first introduced by IBM over 30 years ago! As such, it would be easy to consider it an old, uninteresting, mature technology… but this is far from true! Instead, Flip-Chip is keeping up with the times and developing new bumping solutions to serve the most advanced technologies, like 3DIC and 2.5D. Indeed, no matter what packaging technology you're using, a bumping step is always required at the end! In 2012, bumping technologies accounted for 81% of the total installed capacity in the middleend area. That's big. Really big. So big that it represents 14M+ 12''eq wafers (2012 installed capacity: see figure below) - and fab loading rates are high as well, especially for the Cu pillar platform (88%). Flip-Chip is also big on value: in 2012 it was a $20B market (making it the biggest market in the middle-end area), and we expect it to continue growing at an 9% clip, ultimately reaching $35B by 2018!
Flip-Chip capacity is expected to grow over the next five years to meet large demand from three main areas: 1) CMOS 28nm IC, including new applications like APE and BB; 2) The next generation of DDR Memory; and 3) 3DIC/2.5D interposer using micro-bumping. Driven by these applications, Cu pillar is on its way to becoming the interconnect of choice for Flip-Chip. In addition to traditional applications which have used Flip-Chip for a while now (laptop, desktop and their CPUs, GPUs & Chipsets - which are growing slowly but still represent significant production volumes for Flip-Chip), we expect to see strong demand from mobile & wireless (smartphones), consumer applications (tablets, smart TV, set top box), computing and highperformance/ industrial applications such as network, servers, data centers and HPC. The new "Flip-Chip packaged ICs" are expected to radically alter the market landscape with new specific motivations that will drive demand for wafer bumping. In the context of 3D integration and the "More than Moore" approach, Flip-Chip is one of the key technology bricks and will help enable more sophisticated system on chip integration than ever before!
Flip-Chip is being reshaped by a new kind of demand that is hungry for Cu pillars and micro-bumps, which are on their way to becoming the new mainstream bumping metallurgy for die interconnection.
Meanwhile, Cu pillar is fast becoming the interconnect of choice for Advanced CMOS (≤ 28 nm), Memory, and micro-bumping for 2.5D Interposer and 3DIC
In addition to studying mainstream bumping technologies, this report focuses on Cu pillar bumping, which is becoming increasingly popular for a wide variety of applications. The massive adoption of Cu pillars is motivated by a combination of several drivers, including very fine pitch, no UBM needed, high Z standoff, etc.
Cu pillar Flip-Chip is expected to grow at a 35% CAGR between 2010 - 2018 in terms of wafer count. Production is already high at Intel, the #1 Flip-Chip producer - and by 2014, more than 50% of bumped wafers for Flip-Chip will be equipped with Cu pillars. As early as 2013, micro-bumping for 2.5D & 3DIC, in conjunction with new applications like APE, DDR memory, etc., will boost Flip-Chip demand and create new challenges and new technological developments. Today, Flip- Chip is available in a wide range of pitches to answer the specific needs of every application.
The ultimate evolution in bumping technologies will consist of directly bonding IC with copper pads. 3D integration of Ics using this bump-less Cu-Cu bonding is expected to provide an IC-to-IC connection density higher than 4 x 105 cm-2, making it suitable for future wafer-level 3D integration of IC in order to augment Moore's Law scaling.
Taiwan: The #1 location for Flip-Chip bumping
The major OSATs are preparing to produce fcBGAbased Cu pillar packages and won't limit the reach of cu pillar bumping to fcCSP. This will allow every company involved in CPU, GPU Chipset, APE, BB, ASIC, FPGA and Memory to access Cu pillar Flip- Chip technology.
Cu pillar capacity is expected to grow rapidly over the 2010 - 2014 timeframe (31% CAGR), hitting ~ 9M wspy by 2014 and supporting the growing demand for micro-bumping and advanced CMOS IC bumping.
In the mutating middle-end area, CMOS foundries now propose wafer bumping services (TSMC, GLOBALFOUNDRIES, etc.), as opposed to bumping houses, which are dedicated to bumping operations (FCI, Nepes, etc.), and OSATs, which keep investing in advanced bumping technologies. In 2012, OSATs owned 31% of installed capacity in ECD solder bumping and 22% of installed capacity in Cu pillar bumping. A full overview of 2012 installed capacities for all bumping platforms is provided in this report.
Concerning geography, Taiwan has the biggest overall bumping capacity (regardless of the metallurgy), with important capacity coming from foundries and OSAT factories. Taiwan currently leads the outsourcing "solder & copper" Flip-Chip wafer bumping market.
Flip-Chip market growth, spurred on by the emergence of the "middle-end" environment, has challenged traditional "IDM vs. Fabless" supplychain possibilities more than ever before!
OBJECTIVES OF THE REPORT
• Update the business status of the Flip-Chip market.
• Provide a forecast for the next five years, and predict future trends.
• Deliver an overview of the technology trends and applications which use Flip-Chip technology.
COMPANIES CITED IN THE REPORT (NON-EXHAUSTIVE)
3M, AdvanPack Solutions, AEM Tec, Ajinomoto, Akita, Altera, AMD, Amkor, Apple, Applied Materials, ASE, Asymtek, Bergquist, Carsem, Casio Micronics, Chipbond, Chipmos, Chomerics, Cookson, Dalsa, Datacon, Dek, Denka, Dow Chemical, Dow Corning, Elpida, EM Microelectronic, Epcos, eSilicon, FCI, Fraunhofer IZM, Fuji Polymer, Fujitsu, GLOBALFOUNDRIES, Global Unichip, Henkel, Hitachi Chemical, Honeywell, Ibiden, IBM, IC interconnect, IMI, Indium Corporation, Infineon, Intel, Ipdia, JCAP, J-devices, Kinsus, Kyocera, LB Semicon, Lord Corporation, Lumileds, Micrel, Minami, Murata, Namics, Nanium, Nan Ya, Nepes, Nexx, Nichia, Nokia, Nordson, Nvidia, NXP, OKI, Omnivision, Optopac, OSE, Pactech, Panasonic, Polymatech, PowerTech (PTI), Premier Semiconductor Services, Qualcomm, Renesas, Samsung, Samsung Electromechanics (SEMCO), Shibuya, Shin Etsu, Shinko Electric, Silex Microsystems, Siltech, Sony Chemical, SPIL, STATS ChipPAC, SK-Hynix, STMicroelectronics, Sumitomo, TDK, Tessera, Texas Instruments, Tong Hsing, Toray, Toshiba, Triquint, TSMC, UMC, Unimicron, Unisem, UTAC, Xilinx, Zymet and more…
TABLE OF CONTENTS • Table of contents 2 • Glossary 5 • Report scope 6 > What's new ? > Report technology scope > Report objectives > Companies cited in the report • Executive summary 18 > General conclusions > Flip-Chip market in 2012 > Flip-Chip market in 2018 • Recent key press headlines 65 • Flip-Chip market forecast 69 > Methodology > Flip-Chip activity – Wafer forecast - By metallurgy type - By area and end products > Flip-Chip activity – Unit forecast • Flip-Chip installed capacities 96 > Methodology > 2012 installed capacities > Recent activity and investments for FC > Focus on PTI's recent investment > Matching 2012 top down and bottom up > Summary • Flip-Chip market value 123 > Flip-Chip market value forecast > 2012 total Flip-Chip market value by COO segment > 2012 total Flip-Chip market value by end use type > 2012 Flip-Chip in package market value by COO segment > 2018 total Flip-Chip market value by COO segment (forecast) • Infrastructure & supply chain 131 > Transforming golbal IC packaging supply chain > Flip-Chip supply chain > Typical Flip-Chip flow-chart > Flip-Chip supply chain ecosystem > Business model in Flip-Chip space > Flip-Chip players > Business cases and supply chain examples • Bumping technologies 148 > Overview of bumping technologies > Focus on Cu pillar bumping > Micro-bumping for 2.5D/3DIC > C2 & TCB – Applications and trends • Assembly technologies 217 > Substrates > Flip-Chip bonders > TIM > Underfills • Flip-Chip applications & market 258 > Memories > Imaging > 2D Logic SoC > HB-LED > Small logic, RF, Power, Analog and mixed signals ICs > Micro-bumping for 2.5D & 3D SiP/SoC • Conclusions & perspectives 326 • Presentation of Yole Développement's Activity 331
Contact Clare: [email protected]
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