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Flow Reaches Milestone: PPU Achieves End-to-End CPU Operations in Alpha Testing

Flow Computing Logo

News provided by

Flow Computing

May 14, 2025, 09:00 ET

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HELSINKI , May 14, 2025 /PRNewswire/ -- Flow Computing, the pioneer in licensing on-die, ultra-high-performance parallel computing solutions to CPU vendors of all architectures, announced it achieved a critical milestone in its roadmap towards commercializing its parallel processing ecosystem today.

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The Founders of Flow Computing (L-R: Dr. Martti Forsell, Timo Valtonen, Jussi Roivainen)
The Founders of Flow Computing (L-R: Dr. Martti Forsell, Timo Valtonen, Jussi Roivainen)
Flow's CPU Architecture Featuring Integrated PPU, GPU, and NPU Cores
Flow's CPU Architecture Featuring Integrated PPU, GPU, and NPU Cores
Simplified View of Flow's CPU Architecture with PPU Core Integration
Simplified View of Flow's CPU Architecture with PPU Core Integration
Dr. Martti Forsell, CTO, Chief Architect, and Co-Founder of Flow Computing.
Dr. Martti Forsell, CTO, Chief Architect, and Co-Founder of Flow Computing.
Timo Valtonen, CEO and Co-Founder of Flow Computing.
Timo Valtonen, CEO and Co-Founder of Flow Computing.

Capable of boosting any CPU architecture by up to 100x, Flow has developed a compiler that enables source code to take advantage of its Parallel Processing Unit (PPU) architecture. That compiler has now entered Alpha testing, marking the first successful end-to-end execution of PPU-enhanced CPU code.

Initial testing shows that parallel workloads result in a high number of loops in standard RISC-V® CPUs. When recompiling for a CPU integrated with the PPU, those loops are significantly reduced, providing early proof that Flow's architecture delivers substantial performance gains.

The compiler identifies parallel elements in existing code and assigns them directly to the PPU, bypassing traditional CPU bottlenecks. Programs are compiled into extended RISC-V binaries and executed in Flow's gem5-based simulator, which models a CPU integrated with PPU cores.

This milestone demonstrates full end-to-end functionality and confirms Flow is on schedule for the next phase: advanced PPU performance modeling in the coming months.

About gem5
gem5 is a widely used open-source simulator for processor design and performance analysis, supporting architectures such as RISC-V. It is leveraged by companies including AMD®, ARM®, Google®, Intel®, Qualcomm®, and SiFive®.

About the PPU
Flow's PPU is a licensable, on-die accelerator that scales linearly with the number of integrated cores. Out-of-the-box, replacing some CPU cores with PPUs can deliver 2x performance without changing software source code. The PPU works across all instruction sets (ARM, RISC-V, x86, IBM® Power®, etc.) and benefits all connected compute units, including GPUs and NPUs.

Quotes
"What we've shown is that CPUs without the PPU enhancement suffer from massive loop behavior, which is dramatically reduced with the PPU," said Dr. Martti Forsell, CTO and Co-founder.

CEO Timo Valtonen added, "This proves our architecture works end-to-end. It's a real step toward market readiness."

About Flow

Flow is a Helsinki-based startup enabling next-gen CPU performance with PPU technology. Learn more at flow-computing.com. Follow us on LinkedIn via linkedin.com/company/flow-computing.

For media information, please contact [email protected].

Photo: https://mma.prnewswire.com/media/2687199/Flow_Computing_Founders.jpg
Photo: https://mma.prnewswire.com/media/2686458/Flow_Computing_04_B.jpg
Photo: https://mma.prnewswire.com/media/2686459/Flow_Computing_04_A.jpg
Photo: https://mma.prnewswire.com/media/2686461/Flow_Computing_Martti_Forsell.jpg
Photo: https://mma.prnewswire.com/media/2686460/Flow_Computing_Timo_Valtonen.jpg
Logo:  https://mma.prnewswire.com/media/2686457/Flow_Computing_Logo.jpg

SOURCE Flow Computing

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