InPA Systems Reveals Active Debug™ and Full Visibility Rapid Prototyping Technology at DesignCon

SAN JOSE, Calif., Jan. 24, 2011 /PRNewswire/ -- InPA Systems, Inc. announced today that it will participate in DesignCon, its first-ever conference and trade show and the company's first public foray since its company launch in August 2010 (at Booth #827).  At DesignCon, InPA will reveal and demonstrate its Active Debug™ and Full Visibility technology with FPGA-based rapid prototypes.  InPA executive Joe Gianelli will participate on a conference panel, and semiconductor and EDA icon Bernie Aronson, a key InPA advisor, will be on hand at the InPA booth to discuss chip design trends and business issues and how InPA fits into those directions.  InPA will also distribute a white paper on the technology to interested parties.

InPA Systems came on the scene last August when it announced the formation of its company.  Now at DesignCon, InPA will exhibit its Active Debug™ and Full Visibility technology, which allows users unprecedented visibility and control of the verification and validation process when integrating software and hardware onto SoC designs.  The primary benefit to users?  A drastic reduction in the current prototyping debug methodology's highly iterative process of  "blind" or passive probing and multiple FPGA implementation iterations. Customers and interested parties will be able to see a demo of the InPA technology and talk with company executives and Bernie Aronson, former CEO of Kilopass and Synplicity, who has recently joined the InPA Advisory Board.  Aronson will be available both exhibit days.

Aronson commented, "These days, I only join advisory boards of companies that really intrigue me – whose technology contributes dramatic change in design efficiency or performance.  InPA's technology gives the designer full visibility into the debug process and helps them detect the real problems much faster.  It's the first time a verification engineer can quickly pinpoint problems that emerge in FPGA-based prototypes, and that surely is a major technological milestone.  That's why I want to talk about how this technology plays in chip design methodologies coming up and what the potential business consequences are.  I'll be at DesignCon to do just that."

InPA will also participate in the conference program at DesignCon.  Joe Gianelli, InPA Vice President of Marketing and Business Development, will be on a DesignCon technical panel session focused on designing FPGA based PCBs (#TP – W3) and chaired by publisher and editor, Kevin Morris.  This panel will take place on Wednesday, February 2 at 3:45 in Ballroom G.  Panelists will be discussing the challenges design teams face in optimizing the FPGA design across multiple domains PCB, schematics and FPGA timing and exploring how to solve these issues. 

A white paper that discusses InPA's technology will also be on hand at the InPA exhibit booth.  Copies of this white paper will be available to DesignCon attendees and to the general public thereafter.  

About InPA Systems

InPA is an innovator in FPGA-based rapid prototyping.  The company integrates RTL simulation, and FPGA prototype hardware, provides an Active Debug™ and Full Visibility methodology and enables full visibility into the multi-FPGA prototype to compress the time it takes to debug SoC designs.  Privately held and funded, InPA was founded in 2007 in San Jose. Its corporate headquarters is at 22 Great Oaks Blvd. Suite 280, San Jose, CA 95119-1457, phone: (408) 362-1541, fax: (408) 362-9087. On the Web at: www.inpasystems.com/

Note:  InPA and Active Debug™ are trademarks of InPA Systems, Inc.    All other trademarks and registered trademarks are the property of their respective owners.  

SOURCE InPA Systems, Inc.