ALISO VIEJO, Calif., June 15, 2017 /PRNewswire/ -- Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced the release of its SoftConsole version 5.1, the world's first available Windows-hosted Eclipse integrated development environment (IDE) for designs utilizing RISC-V open instruction set architectures (ISAs) such as RV32I. SoftConsole, Microsemi's free software development environment enabling rapid production of C and C++ programming language designs for its field programmable gate arrays (FPGAs), will be showcased at the Design Automation Conference (DAC) in a presentation highlighting its open architecture, low power and development capabilities using RISC-V soft central processing unit (CPU) cores.
"With the majority of Microsemi FPGA designers utilizing a Windows platform for their development efforts, SoftConsole v5.1 not only supports our RISC-V soft CPU cores to enable designs with our highly secure and reliable FPGAs, but it can also be used for any RV32I standard ISA extensions," said Tim Morin, director of marketing at Microsemi, who will be presenting on the subject at DAC on June 20. "This product release broadens the RISC-V ecosystem for those developing on Windows machines, and leverages our leadership position as we continue investing in this architecture to provide customers dependable, long-term roadmap support."
Microsemi's SoftConsole v5.1, a GNU compiler collection (GCC), now supports both Windows and Linux for RISC-V designs and can be used for RV32I implementations including extensions to the baseline RV32I architecture such as M,A,F,D,G and C. Offering low power and an open architecture, it supports Microsemi's PolarFire™, RTG4™, SmartFusion™2 and IGLOO™2 FPGA-based RISC-V soft CPUs as well as the HiFive1 Arduino kit from SiFive, a fabless semiconductor company that produces computer chips based on the RISC-V ISA. SoftConsole v5.1 is ideal for developing a wide variety of applications within the aerospace and defense, communications, data center and industrial markets.
RISC-V, an ISA which is now a standard open architecture under the governance of the RISC-V Foundation, offers numerous benefits, including enabling the open source community to test and improve cores at a faster pace than closed ISAs. As the RISC-V intellectual property (IP) core is not encrypted, it can be used to ensure trust and certifications not possible with closed architectures. Portability is another benefit of the technology. For example, designers can begin development with Microsemi's RISC-V core in its FPGAs and then move to an application-specific integrated circuit (ASIC) royalty-free.
"Rumble Development is excited Microsemi is investing in RISC-V with its IP core and the new version of the SoftConsole IDE," said Michael Aronson, president of Rumble Development, a customer of Microsemi which provides custom logic solutions to original equipment manufacturers (OEMs). "We believe the portability, stability and openness of this ISA combined with Microsemi's ecosystem will enable us to innovate faster and deliver best-in-class solutions."
As a free software development environment supporting quick development of C and C++ executables for Microsemi's FPGAs using RISC-V soft CPU cores, SoftConsole v5.1 provides a flexible and easy-to-use graphical interface for managing embedded software development projects. Customers can quickly develop and debug software programs and implement them in Microsemi FPGAs, with a fully integrated debugger offering easy access to memory contents, registers and single-step execution. SoftConsole also enables users to configure project settings and organize files, provides simultaneous access to multiple tool windows, and delivers the ability to quickly switch editing and debug views. In addition, Libero SoC, Microsemi's comprehensive suite of FPGA design tools, includes the Firmware Catalog to export firmware for soft CPU FPGA designs which can be imported into SoftConsole.
The RISC-V ISA was named Best Technology of 2016 by The Linley Group at its annual Analysts' Choice Awards in January 2017, where its principal analyst Linley Gwennap expressed support of the emerging technology.
"RISC-V is a modern take on the classic RISC instruction set, providing a clean and extensible approach suitable for a broad range of microprocessor implementations. More significantly, the open source, royalty-free RISC-V instruction set creates a new business model for CPU designers," said Gwennap. "This combination has generated sizable industry interest in RISC-V, which will lead to several commercial deployments this year and beyond."
Through Microsemi's early involvement in the creation of the RISC-V Foundation, the company has an established leadership role in the emerging standard and ecosystem and is working closely with the nonprofit to ensure the ISA becomes an industry standard for a wide variety of computing devices. Ted Speers, head of product architecture and planning for Microsemi's SoC business unit, was appointed to the inaugural board of directors of the RISC-V Foundation in July 2016, and Ted Marena, director of SoC FPGA marketing, was elected as vice-chair of the RISC-V Marketing Committee in August 2016.
DAC Presentation on SoftConsole and RISC-V at 1:30 p.m. June 20
Microsemi's new SoftConsole v5.1 will be showcased by Morin in a presentation titled, "RISC-V Tool Chain—An Example Implementation" as part of the RISC-V educational sessions at the DAC in Austin, Texas on Tuesday, June 20 at 1:30 p.m. local time. For more information, visit http://www2.dac.com/events/eventdetails.aspx?id=223-23.
Microsemi's SoftConsole v5.1 is available now. For more information, visit http://www.microsemi.com/products/fpga-soc/soc-processors/risc-v and https://www.microsemi.com/products/fpga-soc/design-resources/design-software/softconsole or contact [email protected].
About Microsemi's FPGAs
Microsemi's new cost-optimized PolarFire FPGAs deliver the industry's lowest power at mid-range densities with exceptional security and reliability. The product family features 12.7 Gbps SerDes transceivers at up to 50 percent lower power than competing FPGAs. With densities spanning from 100K to 500K logic elements (LEs), the non-volatile PolarFire product family consumes 10 times less static power than competitive devices and features an even lower standby power referred to as Flash*Freeze. The company's IGLOO™2 FPGAs and SmartFusion™2 SoC FPGAs deliver more resources in low density devices, with the lowest power, proven security and exceptional reliability. The devices offer 30-50 percent more power efficiency and are ideal for general purpose functions such as Gigabit Ethernet or dual PCI Express control planes, bridging functions, input/output (I/O) expansion and conversion, video/image processing, system management and secure connectivity. Microsemi's RTG4 FPGAs bring new capabilities to the market and combine a wealth of features with the highest quality and reliability to meet the increasing demands of modern satellite payloads. RTG4's reprogrammable flash technology offers complete immunity to radiation-induced configuration upsets in the harshest radiation environments, without the configuration scrubbing required with SRAM FPGA technology.
Microsemi Corporation (Nasdaq: MSCC) offers a comprehensive portfolio of semiconductor and system solutions for aerospace & defense, communications, data center and industrial markets. Products include high-performance and radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices and precise time solutions, setting the world's standard for time; voice processing devices; RF solutions; discrete components; enterprise storage and communication solutions, security technologies and scalable anti-tamper products; Ethernet solutions; Power-over-Ethernet ICs and midspans; as well as custom design capabilities and services. Microsemi is headquartered in Aliso Viejo, California and has approximately 4,800 employees globally. Learn more at www.microsemi.com.
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"Safe Harbor" Statement under the Private Securities Litigation Reform Act of 1995: Any statements set forth in this news release that are not entirely historical and factual in nature, including statements related to the release of its SoftConsole version 5.1, the world's first available Windows-hosted Eclipse IDE for designs utilizing RISC-V open ISAs such as RV32I, and its potential effects on future business, are forward-looking statements. These forward-looking statements are based on our current expectations and are inherently subject to risks and uncertainties that could cause actual results to differ materially from those expressed in the forward-looking statements. The potential risks and uncertainties include, but are not limited to, such factors as rapidly changing technology and product obsolescence, potential cost increases, variations in customer order preferences, weakness or competitive pricing environment of the marketplace, uncertain demand for and acceptance of the company's products, adverse circumstances in any of our end markets, results of in-process or planned development or marketing and promotional campaigns, difficulties foreseeing future demand, potential non-realization of expected orders or non-realization of backlog, product returns, product liability, and other potential unexpected business and economic conditions or adverse changes in current or expected industry conditions, difficulties and costs of protecting patents and other proprietary rights, inventory obsolescence and difficulties regarding customer qualification of products. In addition to these factors and any other factors mentioned elsewhere in this news release, the reader should refer as well to the factors, uncertainties or risks identified in the company's most recent Form 10-K and all subsequent Form 10-Q reports filed by Microsemi with the SEC. Additional risk factors may be identified from time to time in Microsemi's future filings. The forward-looking statements included in this release speak only as of the date hereof, and Microsemi does not undertake any obligation to update these forward-looking statements to reflect subsequent events or circumstances.
SOURCE Microsemi Corporation