SANTA CLARA, Calif., April 17, 2013 /PRNewswire/ -- Andes Technology (www.andestech.com), Asia's leading supplier of licensable processor cores, today announced their newest, ultra power-efficient 32-bit processor series: the AndesCore™ N7. Codenamed "Hummingbird," due to its compact size and energy efficiency, this family of small cores is derived from 8-years research by Andes' Taiwan-based team. Customer applications include embedded processing devices that require low energy consumption, such as controllers for touchscreen, storage, hand-held devices, sensors, and for network connectivity applications like IoT (Internet-of-Things).
Andes' President, Frankwell Lin, commented, "The N7 was created for SOC designs that have performance constrained by ultra-low energy consumption and a small size. By implementing our latest AndeStar™ V3m architecture in a 2-stage pipeline, the N7 is the most power-efficient member of the Andes family. As with all of our IP cores, N7 is fully supported by the an integrated GCC tools environment and comes with complete software development environment and libraries to increase productivity and reduce cost."
In terms of efficiency, the N7 delivers an impressive 108 DMIPS/mW, which is 30% higher than products from other suppliers. It also incorporates new mechanisms that provide for acceleration of applications that utilize higher latency flash memory which improve memory access efficiency while leveraging the processor's performance and power. The size of the AndesCore™ N7 can be as small as 12K gates. This makes it an ideal alternative to 8051 and other 8-bit processor cores, while delivering the programmability benefits of a 32-bit processor solution.
"Power efficiency is the new battleground," observed Linley Gwennap, principal analyst of The Linley Group. "By squeezing the most performance out of a very low power budget, Andes Hummingbird CPU enables some interesting new applications."
The N7 is being demonstrated in Linley Tech Mobile Conference on Apr 17th at Hyatt Regency Hotel, Santa Clara and at the GSA Silicon Summit on Apr 18th at Computer History Museum, Mountain View. For more information about the AndesCore™ N7 Series or any of our other low-power, high-performance IP cores and subsystems, please refer to www.andestech.com or contact us at firstname.lastname@example.org.
SOURCE Andes Technology