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      Open Compute Project Expands Open Chiplet Economy Ecosystem

      Open Compute Project Foundation (OCP) (PRNewsfoto/Open Compute Project Foundation)

      News provided by

      Open Compute Project Foundation

      Oct 14, 2025, 12:20 ET

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      New contributions to OCP include Foundation Chiplet System Architecture (FCSA) and BoW 2.0 for memory-intensive AI and HPC workloads

      SAN JOSE, Calif., Oct. 14, 2025 /PRNewswire/ -- Open Compute Project Foundation (OCP), the nonprofit international organization bringing at-scale innovations and hyperscale best practices to all, today announced major contributions that expand the OCP Open Chiplet Economy and strengthen industry collaboration around chiplet-based design.

      • An Arm led workstream contributing the Foundation Chiplet System Architecture (FCSA), a vendor-neutral specification derived from Arm Chiplet System Architecture (CSA). FCA establishes a common baseline for partitioning monolithic systems into interoperable Chiplets, enabling use across any processor architecture, including memory, I/O, and accelerators.

      • An Eliyan-led memory interconnect contribution enhancing the OCP Chiplet Interconnect Specification BoW 2.0. to support advanced memory bandwidth requirements for AI, HPC, gaming, and automotive workloads.

      "These contributions reflect the momentum of the Open Chiplet Economy, as it is based on a strong foundation of collaboration on open standardizations, tools and best practices," said Cliff Grossner, Ph.D., Chief Innovation Officer at OCP. "The Foundation Chiplet System Architecture provides a neutral baseline for collaboration, reducing fragmentation and giving the industry confidence in true interoperability. Meanwhile, BoW 2.0 enhancements extend Chiplet adoption into memory-intensive applications. Together they mark an important step toward open, interoperable silicon systems for designing, building and deploying economically viable and dynamic AI Clusters capable of achieving world-leading performance in HPC and AI workloads."

      Foundation Chiplet System Architecture (FCSA)

      The Foundation Chiplet System Architecture (FCSA) responds to the industry's need for open, interoperable foundations to make chiplet design practical at scale. By contributing FCA to OCP and its members, Arm is enabling progress toward a chiplet marketplace that is vendor-neutral. FCA is a baseline for how System-in-Package (SiP) designers can decompose monolithic SoCs into Chiplets, specifying common partitioning approaches that can span processor architectures. This will help the industry maximize the re-use of Chiplets, lead to wider choice of compatible IP blocks, enable common design and validation tooling, and maximize flexibility and choice by avoiding lock-in to proprietary Chiplet standards.

      "As AI drives a fundamental shift in how data centers are built, Chiplets are becoming critical to building scalable, efficient infrastructure," said Mohamed Awad, senior vice president and general manager, Infrastructure Business, Arm. "By contributing the Foundation Chiplet System Architecture to OCP, we're helping lay the groundwork for an open Chiplet ecosystem that unlocks innovation across the industry and accelerates the path to AI-optimized silicon."

      BoW 2.0 Memory Interconnect Enhancements

      With modern GPU architectures including directly attached memory implemented using Chiplets, the need for an open Chiplet Interconnect specification has become an imperative. Eliyan's contribution extends the OCP Chiplet Interconnect Specification (BoW 2.0) with features designed for high-bandwidth memory applications, including support for dynamic (half-duplex) bidirectional data, allow provisioning of lanes as fixed unidirectional to support command and address information, increase BoW slice width to 18-bits to accommodate two data line error correction bits, and allow for additional options for clock & data alignment needed for memory applications. A target use case is to support the bandwidth of HBM4 (2TB/s read or write) along with overhead bandwidth for ECC and control signals, and fit it in a beachfront of <10mm.

      "Eliyan is proud to continue to be a key contributor to the Bunch of Wires (BoW) chiplet interconnect specification, and specifically to lead this important BoW Memory Addendum. With an eye toward chiplet and HBM connectivity across a wide range of applications and use cases, this specification enables the BoW D2D interface to be more efficiently used to directly connect memory devices to ASICs in either standard or advanced packaging. These extensions will further help address the Memory Wall challenge that is restricting performance of all types of AI systems – HPC server, automotive, gaming – and dramatically improve memory bandwidth for XPUs" said Kevin Donnelly, Vice President of Strategic Marketing at Eliyan.

      Expanding the Open Chiplet Economy

      "We have been experiencing significant growth in participation within the Open Chiplet Economy project, with several workstreams launching this year. This is no surprise as Chiplets are poised to move from an in-house or mostly closed large vendor-led ecosystems to open and standardized ecosystems with advancements driven by collaborations between large and small companies, which is exactly what the OCP is designed to encourage," said Anu Ramamurthy and Jawad Nasrullah, OCP Open Chiplet Economy Project leads.

      The Open Chiplet Economy continues to grow following the launch of the OCP Chiplet Marketplace in 2024, providing a catalogue of Chiplets, design tools, and services. With FCSA and BoW 2.0 enhancements, OCP further enables open, interoperable approaches to chiplet-based design, creating opportunities for companies of all sizes to innovate and collaborate.

      "As AI workloads reshape system design, silicon must be flexible and interoperable to scale economically. By contributing this specification to OCP, we are laying the foundation for an open, architecture-neutral chiplet marketplace where vendors can combine solutions with confidence. This accelerates growth, reduces fragmentation, and delivers interoperability at scale." Daniel Nishball, Director of Research, SemiAnalysis

      About the Open Compute Project Foundation

      The Open Compute Project (OCP) brings at-scale innovations and hyperscaler best practices to all, spanning technology domains from the data center to the edge, and the technology stack from silicon, to systems, to site facilities and services. The international OCP Community is made up of organizations and people from hyperscale cloud data center operators, communications providers, colocation providers, diverse enterprises, and technology vendors. With the tenets of openness, impact, efficiency, scale and sustainability, the OCP engages and educates thousands of engineers every year. Across many projects and initiatives the OCP Foundation and Community are meeting the market today and shaping the future.

      Learn more at: www.opencompute.org.

      Media Contact
      Dirk Van Slyke
      Open Compute Project Foundation
      Chief Marketing Officer
      [email protected]
      Mobile: +1 303-999-7398
      (Central Time Zone/CST/Houston, TX)

      SOURCE Open Compute Project Foundation

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