MILPITAS, Calif., March 9, 2011 /PRNewswire/ -- Open-Silicon, Inc., a leading SoC design and semiconductor manufacturing company, announced today that Mr. Taher Madraswala, VP of engineering for Open-Silicon, will participate in a special executive session at Design, Automation & Test in Europe (DATE) in Grenoble, France.
Mr. Madraswala will present "Ideas on EDA and IP Convergence" during an executive session about today's EDA and IP industries and the upcoming challenges they face. Moderated by Peggy Aycinena of EDA Confidential, Mr. Madraswala will be joined by other senior-level executives from Atrenta, ARM, Cadence, Infineon and Synopsys.
Session Overview: Designing today's emerging chips necessitates advanced methods and flows, which include the utilization of a coherent set of IP blocks and interoperable EDA tools. This impacts today's IP and EDA industries and results in new solutions based on technical and business alliances and convergence. This session will discuss the above topic and address the upcoming challenges.
Location: Oisans Room, Alpexpo, Avenue d'Innsbruck, Grenoble, France
Date/Time: Tuesday, March 15, 2011, 11:30 a.m.
About Open-Silicon, Inc.
Open-Silicon, Inc. is a leading semiconductor company focused on SoC realization for traditional ASIC, develop-to-spec, and derivative ICs. Open-Silicon's OpenModel brings together Open-Silicon's engineering technology and high-quality manufacturing services with one of the broadest partner ecosystems for IC development, spanning IC design, open market IP integration, wafer fabrication, and assembly/test services. Open-Silicon received the Global Semiconductor Alliance (GSA) award for Most Respected Private Semiconductor Company in 2008 and 2009. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.
SOURCE Open-Silicon, Inc.