MOUNTAIN VIEW, Calif., June 7 /PRNewswire-FirstCall/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the open source availability of its widely used Interconnect Technology Format (ITF) for parasitic modeling and the formation of a technical advisory board (TAB) under the auspices of IEEE Industry Standards and Technology Organization (IEEE-ISTO). The purpose of the Interconnect Modeling TAB (IMTAB) is to facilitate the evolution of ITF and promote an interoperable interconnect modeling format to address the industry's advancing process technology and design needs. IMTAB founding members include representatives from industry-leading semiconductor companies, EDA companies and silicon foundries including Altera Corporation, AMD, Apache Design Solutions, GLOBALFOUNDRIES, LSI Corporation, Magma Design Automation, NVIDIA, Qualcomm, STMicroelectronics and Synopsys. Following the same model as the industry-standard Liberty™ library modeling format, ITF access is granted under an open source license through Synopsys' Technology Access Program (TAP-in(SM)) and is available free of charge to anyone.
"An interoperable interconnect modeling format is invaluable for our design teams at leading-edge technologies," said Philippe Magarshack, STMicroelectronics Technology R&D Group Vice President and Central CAD and Design Solutions General Manager. "A common format will allow us to seamlessly leverage various EDA tools that support it in our design flows and increase overall efficiency. We are quite pleased with Synopsys' proposal to advance interoperability in the industry and look forward to the adoption of ITF as an industry-wide standard."
"Synopsys has been at the forefront in promoting open industry standards through collaborative initiatives that foster greater interoperability and increase efficiency for the entire industry. Synopsys pioneered open sourcing of standards over a decade ago with the Liberty and SystemC standards," said Rich Goldman, vice president of corporate marketing and strategic alliances at Synopsys. "The creation of the IMTAB similarly extends our standardization efforts to interconnect modeling, an area of increasing importance at advanced process technologies. By working with industry-leading member companies, we hope to replicate the success of Liberty and accelerate the evolution of Synopsys ITF into a common industry format."
"The IEEE-ISTO collaborates with a wide range of industry groups, providing a broad inclusiveness to bring open standards to fruition and to ensure their success in the market," said Peter Lefkin, IEEE-ISTO Marketing and Business Development Executive. "We are committed to providing the new EDA industry TAB initiative with the support necessary to help achieve its goals and objectives."
"We are pleased to join the IMTAB to advance an open standard for interconnect modeling," said Eugene Chen, director of CAD Engineering at Altera Corporation. "We look forward to working together with other founding members to enable broader adoption of the interoperable ITF format at advanced process technology to achieve better accuracy and turnaround time."
"The ITF open source licensing and the IMTAB announcement today by Synopsys will benefit the design community," said Prabhu Krishnamurthy, senior director of Design Tools and Methodology at LSI Corporation. "As a founding member of the IMTAB, LSI is committed to driving greater interoperability and creating opportunity to meet the rapidly evolving and emerging needs of designers at leading-edge process technologies."
"NVIDIA supports the open source licensing of the ITF format and the creation of the IMTAB," said James Chen, director of Advanced Technology at NVIDIA. "It will allow the member companies to contribute to the development of the popular format to address the common challenges in advanced process technologies and help to propagate the benefits of the increased interoperability to the rest of the user community."
"Our customers are faced with increasing parasitic extraction challenges as they transition to the smaller geometries of advanced technologies, threatening their productivity as well as silicon success," said Richard Trihy, director of Design Methodology at GLOBALFOUNDRIES. "The formation of a technical advisory board under the IEEE-ISTO will help forge collaboration and alignment in the industry to collectively address these challenges pro-actively in the interoperable ITF format."
"Magma is committed to promoting interoperability, opportunity and choice in the industry," said Robert Smith, vice president of Marketing of Magma's Design Implementation Business Unit. "We welcome Synopsys' open source licensing of the ITF format as the right step forward for increased openness and interoperability between EDA tools. We look forward to collaborating with the other founding members of the IMTAB and bringing the benefits of our coordinated efforts to tackle our customers' growing interconnect modeling concerns."
The IMTAB will initially consist of 12 members and will grow its membership over time. Member companies represent the broad semiconductor industry including the design community, EDA companies and silicon foundries. Requests for format enhancements can come from the membership as well as from the overall interconnect modeling format user base. Companies interested in membership in the IMTAB may contact IEEE-ISTO at email@example.com.
Synopsys' Interconnect Technology Format (ITF) provides detailed modeling of interconnect parasitic effects that enables designers to perform accurate parasitic extraction for timing, signal integrity, power and reliability signoff analysis. ITF offers a flexible and innovative format to accurately model the effects of increased process variation at advanced process technologies. ITF has been evolving for more than 10 years and is the semiconductor industry's most widely used interconnect modeling format. It is supported by leading semiconductor foundries and integrated device manufacturers, and is proven on thousands of production designs.
The latest specifications for the open source licensed ITF can be found at http://www.synopsys.com/Community/Interoperability/Pages/TapinITF.aspx
IEEE-ISTO is the premier trusted partner of the global technology community for the development, adoption, and certification of industry standards. Its mission is to facilitate the life-cycle of industry standards development through a dedicated staff committed to offering vendor neutrality, quality support and member satisfaction. Fostering the market acceptance, adoption and implementation of standardized technologies, IEEE-ISTO programs span the spectrum of today's information and communications technologies. To find out more about IEEE-ISTO, visit www.ieee-isto.org.
Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 65 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.
Synopsys, Liberty and TAP-in are registered trademarks, trademarks or service marks of Synopsys, Inc. SystemC is a trademark of the Open SystemC Initiative and is used under license. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
SOURCE Synopsys, Inc.