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Synopsys Enhances Volume Diagnostics Solution to Accelerate Yield Ramp

Innovations in TetraMAX ATPG and Yield Explorer Increase Throughput and Ease Deployment


News provided by

Synopsys, Inc.

Sep 20, 2011, 09:00 ET

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MOUNTAIN VIEW, Calif., Sept. 20, 2011 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for the design, verification and manufacture of electronic components and systems, today announced new capabilities in TetraMAX® ATPG and Yield Explorer that decrease the time, effort and cost of deploying a volume diagnostics flow and speed-up yield ramp. When yield has not yet reached acceptable levels during initial manufacturing phases, IC product teams must quickly identify and fix the dominant causes of yield loss. Synopsys' enhanced volume diagnostics solution cross-correlates large volumes of data from design, fab and manufacturing test to thoroughly analyze the causes of yield-limiting defects. The latest releases of TetraMAX ATPG and Yield Explorer automate the flow and help to ensure high throughput with a new direct connection between the two products, and functionality to import both physical design and test data from defective silicon using industry-standard formats. These innovations lead to fast, cost-effective deployment of volume diagnostics, shorter time to production yield and improved profit margins for semiconductor companies.

"Quickly diagnosing defects in silicon parts and improving yield requires a robust way to import silicon failure data from the tester," said Tom Morrow, executive vice president, SEMI. "Product teams can swiftly transfer this critical data from a broad range of testers into TetraMAX ATPG and Yield Explorer using the new STDF V4-2007 format developed by SEMI's CAST working group."

Volume diagnostics are essential for efficiently determining the causes of silicon failures that cut into IC profit margins and impact time-to-quality. Synopsys' enhanced volume diagnostics solution is comprised of two products: TetraMAX ATPG identifies potential defects from scan test failures, using physical design data to significantly improve diagnostics accuracy; Yield Explorer analyzes these potential defects across multiple failing devices to uncover systematic yield issues, also using physical design data to identify specific yield-limiting layout geometries. In the latest release, TetraMAX ATPG directly connects to Yield Explorer for fast deployment of the solution and to improve data throughput for production runs that require massive quantities of design, test and fab data. In addition, new support of industry-standard formats maximizes engineering productivity: LEF/DEF facilitates easy, one-time import of physical design data, and STDF V4-2007 enables transfer of defective silicon data from industry-leading testers.

TetraMAX ATPG and Yield Explorer are part of Synopsys' comprehensive synthesis-based test solution, also comprised of DFTMAX™ compression for power-aware scan test, DesignWare® STAR Memory System® solution for test and repair of embedded memories, and DesignWare SERDES IP with built-in self-test. Synthesis-based test enables designers to achieve optimal quality-of-results and eliminate time-consuming iterations between design and test.

"To assist our customers in determining how to improve yield, we continue to develop leading technology that increases both the accuracy and productivity of volume diagnostics," said Arif Samad, vice president of engineering for test automation products at Synopsys. "The latest capabilities in TetraMAX ATPG and Yield Explorer further reduce the time and effort needed to determine the underlying causes of subtle silicon defects."

About Synopsys

Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Synopsys, DFTMAX, DesignWare, STAR Memory System and TetraMAX are registered trademarks or trademarks of Synopsys, Inc. Any other trademarks mentioned in this release are the intellectual property of their respective owners.

Editorial Contacts:
Sheryl Gulizia
Synopsys, Inc.
650-584-8635
[email protected]

Lisa Gillette-Martin
MCA, Inc.
650-968-8900 ext. 115
[email protected]

SOURCE Synopsys, Inc.

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