LAS VEGAS, May 10, 2011 /PRNewswire/ -- Interop -- Tabula and Algo-Logic Systems announce the TSE100x1 packet search engine device. The hardware-accelerated logic chip performs high-speed packet route lookup functions for both IPv4 and IPv6, and enables multi-field packet classification to improve security, QoS, and latency for data centers and other high-performance wired and wireless network switch systems. The TSE100x1 provides a variety of interfaces including a standard DDR parallel interface, Interlaken Look-Aside (ILA), and PCI Express, and it supports search rates up to 100MSPS for exact match tables up to 1M entries, and associative match tables with widths of 40, 80, 160, 320, and 640 bits with up to 16K entries. With its support of multi-tables, the TSE100x1 is virtualization-optimized. It also handles wide TCAM lookup functions enabling the ultra-wide TCAM classification needed for OpenFlow switching 1.1 support in hardware.
"Algo-Logic's layer 2-7 packet processing solutions enables the offload of packet processing algorithms into logic. Algo-Logic's low-latency packet processing IP cores increase throughput in datacenters and lower latency in trading applications", said Dr. John Lockwood, Founder and CEO of Algo-Logic. "We have found that Tabula's ABAX 3PLD devices with their 5.5 MBytes of 8-ported and 16-ported memory are an ideal cost-effective programmable platform for implementation of packet processing functions. They provide the capacity, bandwidth, and memory granularity for a new and more effective approach to associative lookups."
"Whether we are talking individual Ethernet packets, the entire Internet, or DNA chains, the world is become increasingly search-centric.", said Marc Miller, Tabula Senior Marketing Director "The combination of Spacetime breakthrough price/performance and Algo-Logic's expertise in packet processing is enabling a new kind of search engine which are flexible, cost effective and support the rapidly evolving requirements of these applications."
Price and availability
The TSE100x1 device will be available in Q3, 2011, and will be priced at $175 in unit quantities of 1,500. A demonstration board is available now. For purchasing information, a demonstration, or for more information, please contact Tabula at email@example.com or visit Tabula's website at www.tabula.com
About Algo-Logic Systems
Founded by a professor from Stanford University, Algo-Logic has extensive experience building routers, data center switches, and network processing circuits in reconfigurable devices. Algo-Logic specializes in mapping network algorithms into hardware logic.
The Algo-Logic team is expert in developing, documenting, and prototyping logic and systems of reprogrammable networks. Past work is documented in over 100 articles in top journals and technical conference proceedings. For more information on the company and its products, please email Solutions@algo-logic.com or visit the company's website at www.algo-logic.com.
Tabula is a privately held fabless semiconductor company developing 3D Programmable Logic Devices. Its ABAX family of 3PLDs, based on Tabula's patented Spacetime architecture, and supported by its Stylus development software, sets new density, performance, and affordability benchmarks for programmable logic, memory, and signal processing. Headquartered in Santa Clara, California, Tabulahas assembled a leadership team consisting of industry veterans and successful entrepreneurs. The company is backed by top-tier investors with a long-term view toward enduring market leadership. Tabula, the Tabula logo, ABAX, the ABAX logo, Spacetime, the Spacetime logo, Stylus, the Stylus logo, and other designated brands included herein are trademarks of Tabula in the United States and other countries.