Tachyon Design Automation Announces Support for Improved Verilog X Propagation Bug Detection
New feature exposes bugs at RTL level avoiding the need for gate level debugging
MINNEAPOLIS, Dec. 5, 2011 /PRNewswire/ -- Tachyon Design Automation, provider of the fast CVC compiled Verilog simulator, today announced immediate availability of an enhancement that allows detection of design flaws during the early stages of Verilog RTL simulation.
Current Verilog IEEE 1364 Verilog standard semantics is sometimes too pessimistic and at other times too optimistic when unknown (X) values propagate through synthesizable Verilog conditional statements. This lack of accuracy allows design flaws to remain undetected in RTL level Verilog. The problem forces designers to debug using post-synthesis gate level simulation. Debugging designs during slow gate level simulation is difficult and puts a strain on engineering resources which can delay getting products to market.
CVC's new X-propagation feature changes Verilog semantics so that unknown values are treated as having potentially all possible Verilog values 0, 1, or X. This causes propagation of unknown (X) values if any possible value choice can result in an unknown (X). The new technology is a game changer because it allows normal RTL model verification methods to detect a type of systems on a chip (SoC) bug that was previously undetectable.
CVC's X-propagation enhancement is actually a number of options and recording mechanisms that change the semantics of standard Verilog allowing designers to locate, evaluate and fix potential X-bugs during RTL simulation. CVC's X-propagation finds bugs during RTL simulation which are undetectable using formal methods and previously could only be found during gate level simulation. This new feature requires no changes to existing Verilog RTL designs and allows using existing design test benches.
CVC in X-propagation mode has simulation performance degradation no greater than 30 percent. CVC's industry leading performance makes RTL level X-propagation verification a fast and simple solution to a serious problem during Verilog integrated circuit (IC) design.
"I am pleased we were able to answer our customers' requests by providing an efficient and powerful solution which has troubled engineers for years", said Steven Meyer, President of Tachyon. "We have already received positive feedback from customers and believe this will be a popular feature among designers as we continue to expand CVC's capabilities."
About Tachyon
Tachyon Design Automation specializes in electronic design automation (EDA) software used by worldwide electronic companies. Our flagship product, CVC, is a fast compiled Verilog simulator that leads the industry with its unmatched performance, accuracy and capacity.
For more information or to evaluate CVC contact Tachyon Design Automation sales at 612-371-2023 or visit us on the web at www.tachyon-da.com.
Trademarks - All registered trademarks and other trademarks belong to their respective owners.
SOURCE Tachyon Design Automation Corp.
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