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Xilinx Announces Publicly Available Tools and Documentation for 16nm UltraScale+ Devices

Enabling mainstream market adoption and validation of 2-5X greater system level performance/watt over 28nm devices


News provided by

Xilinx, Inc.

Dec 08, 2015, 07:00 ET

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SAN JOSE, Calif., Dec. 8, 2015 /PRNewswire/ -- Xilinx, Inc. (NASDAQ:XLNX) today announced public access support for 16nm UltraScale+™ families, including the Vivado® Design Suite HLx Editions, embedded software development tools, Xilinx Power Estimator, and technical documentation for Zynq® UltraScale+ MPSoC and Kintex® UltraScale+ devices. Designers can now validate the UltraScale+ portfolio's 2-5X performance/watt improvement over 28nm offerings for their specific designs. This announcement marks the industry's first publicly available tools for 16nm devices, enabling broad market adoption. The Vivado Design Suite has been co-optimized to fully exploit the UltraScale+ portfolio's performance/watt advantages and the complete catalog of SmartCORE™ and LogiCORE™ IP. This announcement follows previous UltraScale+ portfolio milestones, including first tape out and early access tools in July 2015, and first customer shipment in September 2015.

Photo - http://photos.prnewswire.com/prnh/20020822/XLNXLOGO

"As the industry's only supplier of public tools and documentation for 16nm programmable devices, we are accelerating mainstream adoption of the most advanced SoCs and FPGAs available today," said Kirk Saban, senior director of FPGA and SoC product management and marketing. "All customers can now validate the superior performance/watt advantages of the UltraScale+ portfolio for their next generation applications."

Availability

Zynq UltraScale+ and Kintex UltraScale+ devices are supported in the Vivado Design Suite 2015.4, HLx Editions. Also available for download are the Xilinx Software Design Kit, Xilinx Power Estimator, and technical documentation for Zynq UltraScale+ and Kintex UltraScale+ families. To learn more about Xilinx development environments visit the Xilinx Hardware Developer Zone and Xilinx Software Developer Zone.

About the Vivado Design Suite HLx Editions

The Vivado Design Suite HLx Editions enable a new ultra high productivity approach for designing All Programmable SoCs, FPGAs, and the creation of reusable platforms. All HLx Editions include Vivado High-Level Synthesis (HLS) including C/C++ libraries, Vivado IP Integrator (IPI), LogicCORE™ IP subsystems, and the full Vivado implementation tool suite to enable mainstream users to readily adopt the most productive and advanced C and IP-based design flows.  When coupled with the new UltraFast™ High-Level Productivity Design Methodology Guide, users can realize a 10-15X productivity gain over traditional approaches.

About the Xilinx UltraScale+ Portfolio

The 16nm UltraScale+ family of FPGAs, 3D ICs, and MPSoCs, combines new memory, 3D-on-3D and multi-processing SoC (MPSoC) technologies enabling an even higher level of performance and integration, and include the SmartConnect interconnect optimization technology. Optimized at the system level, UltraScale+ delivers value far beyond a traditional process node migration – providing 2–5X greater system level performance/watt over 28nm devices, far more systems integration and intelligence, and the highest level of security and safety.

About Xilinx

Xilinx is the leading provider of All Programmable FPGAs, SoCs, MPSoCs, and 3D ICs. Xilinx uniquely enables applications that are both software defined and hardware optimized – powering industry advancements in Cloud Computing, SDN/NFV, Video/Vision, Industrial IoT, and 5G Wireless. For more information, visit www.xilinx.com.

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Copyright 2015 Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.

Xilinx
Silvia E. Gianelli
(408) 626-4328
[email protected]

SOURCE Xilinx, Inc.

Related Links

http://www.xilinx.com

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