PITTSBURGH, Sept. 26, 2013 /PRNewswire/ -- ANSYS (NASDAQ: ANSS) subsidiary Apache Design announced today that its RedHawk™ and Totem™ products have completed methodology innovations to be included in TSMC's Reference Flow for 16nm FinFET technology, an advanced three-dimensional transistor architecture resulting in higher-performing and lower-power integrated circuits (ICs). This is an important milestone helping chip design teams to manage power integrity and electromigration (EM) reliability issues associated with high drive current in advanced technologies. Additionally, RedHawk has been validated for inclusion in TSMC's 3D-IC Reference Flow, enabling smooth integration for three-dimensional IC (3D-IC) multi-die chip design:
The TSMC 16nm FinFET Reference Flow includes RedHawk and Totem tools to provide IR drop analysis, EM verification, metal–insulator–metal capacitor (MiMCap) insertion analysis and overall integration with implementation tools in the design flow. In terms of accuracy correlation, EDA tool certification of DC/AC EM and static/dynamic IR drop analysis is currently in V0.5 of the Design Rule Manual (DRM) and SPICE and will be concluded as the process reaches V1.0.
TSMC's 3D-IC Reference Flow features transient thermal analysis, thermal-aware EM flow, global chip/package decoupling capacitance co-optimization and simultaneous switching noise (SSN) analysis for vertically stacked die.
"The collaboration between TSMC and Apache provides our customers with the ability to efficiently produce more reliable and robust designs for next-generation SoCs (systems on chip)," said Suk Lee, TSMC senior director, design infrastructure marketing division.
"Apache's tools and methodologies address power, noise and reliability challenges for TSMC's most advanced process nodes and design technologies," said Andrew Yang, Apache president. "Through continued collaboration with TSMC, we are able to provide optimized solutions for leading customers."
Visit ANSYS/Apache at TSMC's Open Innovation Platform Ecosystem Forum at 3 p.m. on Oct. 1, in San Jose, Calif. During the conference, Norman Chang, Apache's vice president and senior product strategist, will present "Advanced Power, Signal and Reliability Verification for 20nm, 16nm FinFET, and 3D-IC Designs" in the EDA Track.
About Apache Design, Inc.
Apache Design, an ANSYS subsidiary enables simulation-driven IC and electronic systems design by providing advanced chip-level power analysis, optimization, and sign-off solutions. Apache's integrated products and methodologies advance low-power innovation and address chip-package-system power and noise challenges. Using Apache's engineering simulation software early in the design and throughout the process enables the world's top semiconductor companies to gain a competitive advantage delivering more power-efficient, high-performance, and noise immune chips. Apache's products help lower power consumption, increase operating performance, mitigate design risks, reduce system cost, and shorten time-to-market for a broad range of end-markets and applications. Learn more at: http://www.apache-da.com/.
About ANSYS, Inc.
ANSYS brings clarity and insight to customers' most complex design challenges through fast, accurate and reliable engineering simulation. Our technology enables organizations ― no matter their industry ― to predict with confidence that their products will thrive in the real world. Customers trust our software to help ensure product integrity and drive business success through innovation. Founded in 1970, ANSYS employs over 2,500 professionals, many of them expert in engineering fields such as finite element analysis, computational fluid dynamics, electronics and electromagnetics, and design optimization. Headquartered south of Pittsburgh, U.S.A., ANSYS has more than 70 strategic sales locations throughout the world with a network of channel partners in 40+ countries. Visit www.ansys.com for more information.
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