CAMBRIDGE, England and MOUNTAIN VIEW, Calif., March 21, 2013 /PRNewswire/ --
- Processor-specific methodologies accelerate optimized implementation of ARM® Cortex®-A15 MPCore™ and Cortex-A7 MPCore processor clusters as well as CoreLink™ CCI-400 interconnect, which together can be integrated into a big.LITTLE™ processing system
- Optimized scripts for TSMC 28HPM process technology use Synopsys® Galaxy™ Implementation Platform with ARM Artisan® standard cells and embedded memories, including ARM POP™ technology
- Reference Implementations are available today and include optimized scripts, floorplan, constraints and documentation
- Synopsys reference verification platform for Discovery Verification IP supports the ARM AMBA® 4 ACE™ protocol and CCI-400 interconnect
ARM (LON:ARM; Nasdaq: ARMH) and Synopsys (Nasdaq: SNPS) today announced the availability of optimized 28-nanometer (nm) Synopsys Reference Implementations for ARM Cortex-A15 MPCore and Cortex-A7 MPCore processor clusters as well as the CoreLink CCI-400 cache-coherent interconnect. The companies collaborated to deliver these optimized implementations in TSMC 28HPM process technology using the Synopsys Galaxy Implementation Platform, ARM Artisan standard cells and memories, and ARM POP™ technology for core-hardening acceleration specifically optimized for Cortex-A15 and Cortex-A7 processor implementations. System-on-a-chip (SoC) designers can use these Reference Implementations to create high-performance Cortex-A15 and energy-efficient Cortex-A7 processor clusters, and can combine them with the CCI-400 interconnect to create a big.LITTLE processing system that delivers increased product functionality with longer battery life.
"With a diverse range of products expected in today's end markets, ARM Powered® solutions need to be optimized across a spectrum of energy-efficiency and high-performance targets," said Tom Cronk, executive vice president and general manager, Processor Division at ARM. "The companies' collaboration has resulted in the Synopsys Reference Implementations for Cortex-A15 and Cortex-A7 processors. They will enable our customers to more quickly converge on their aggressive design goals, and take advantage of the benefits of big.LITTLE processing and POP IP to address the demands of their target markets."
Configured for ARM Cortex-A15 and Cortex-A7 processors as well as CCI-400 interconnect, the Synopsys Reference Implementations provide tool scripts, a baseline floorplan, design constraints and documentation to serve as an optimized starting point for implementation. These scripts, built on the widely-used Synopsys tool Reference Methodologies (RMs) and optimized for high-performance cores, leverage Galaxy Platform capabilities such as Design Compiler® Graphical physical guidance for improved timing and post-route correlation. The scripts also leverage IC Compiler™ technologies, including final-stage leakage recovery for reduced leakage power, data flow analysis for faster floorplan creation and transparent interface optimization for faster top-level closure. They are configured for TSMC 28HPM process technology with ARM Artisan standard cells, memories and ARM POP technology. Designers may further optimize the scripts for their own design goals, processor configurations, process technologies and libraries. Reference Implementation technology plug-ins for the Synopsys Lynx Design System will enable a full, chip-level production design flow. Synopsys also provides expert professional services to help designers deploy and customize the Reference Implementations to achieve their specific SoC design goals.
The Synopsys Reference Implementation for the Cortex-A7 processor cluster is for a quad-core MPCore configuration, optimized first for energy efficiency, then for maximum speed to provide energy-efficient multi-processing. For high-performance multi-processing within a tight power envelope, the Reference Implementation for the Cortex-A15 processor cluster targets a dual-core configuration, optimized first for performance, then for power. The CCI-400 interconnect implementation is optimized for the combination of these two processor clusters into a big.LITTLE processing system.
ARM and Synopsys have also collaborated on a reference verification platform for Synopsys Discovery Verification IP, which supports the ARM AMBA® 4 ACE™ protocol and CCI-400 interconnect. With this reference verification platform, verification engineers can rapidly develop highly efficient verification environments for their cache-coherent designs.
"This latest collaboration with ARM continues our long-standing tradition of creating solutions to address our mutual customers' key design challenges," said Antun Domic, senior vice president and general manager, Implementation Group at Synopsys. "The Synopsys Reference Implementations for ARM Cortex-A15 and Cortex-A7 processors as well as CCI-400 interconnect take advantage of ARM and Synopsys technologies as well as our high-performance and low-power design expertise to enable designers to achieve optimized SoC performance and power targets on an accelerated timeline."
Learn More about the Synopsys Reference Implementations for ARM Processors:
SNUG Silicon Valley attendees can learn more about the Synopsys reference implementations next week at the Synopsys User's Group Silicon Valley in Santa Clara, CA:
- Power-Centric Timing Optimization of an ARM Quad-Core Cortex-A7 Processor
- Engineering Trade-Offs in the Implementation of High-Performance Dual-Core ARM Cortex-A15 Processor
- Accelerating SoC Verification with Synopsys Discovery VIP and the ARM CCI-400 Cache-Coherent Interconnect
- Optimization Exploration of ARM Cortex Processor-based Designs with the Lynx Design System
The 28nm Reference Implementation scripts and documentation for dual-core Cortex-A15 MPCore, quad-core Cortex-A7 and CCI-400 interconnect are available today for Synopsys customers under maintenance who are ARMv7 processor licensees: http://www.synopsys.com/ARM-Opto. Lynx technology plug-ins for these Reference Implementations are planned to be available at the end of April, 2013. The Synopsys Verification IP and Reference Platform for AMBA 4 ACE protocol and CCI-400 interconnect are available today from Synopsys.
ARM designs the technology that is at the heart of advanced digital products, from wireless, networking and consumer entertainment solutions to imaging, automotive, security and storage devices. ARM's comprehensive product offering includes RISC microprocessors, graphics processors, video engines, enabling software, cell libraries, embedded memories, high-speed connectivity products, peripherals and development tools. Combined with comprehensive design services, training, support and maintenance, and the company's broad Partner community, they provide a total system solution that offers a fast, reliable path to market for leading electronics companies. Find out more about ARM by following these links:
- ARM website: http://www.arm.com/
- ARM Connected Community: http://www.arm.com/community/
- ARM Blogs: http://blogs.arm.com/
- ARMFlix on YouTube: http://www.youtube.com/user/ARMflix
- ARM on Twitter:
Synopsys, Inc. (Nasdaq: SNPS) accelerates innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor IP, its software, IP and services help engineers address their design, verification, system and manufacturing challenges. Since 1986, engineers around the world have been using Synopsys technology to design and create billions of chips and systems. Learn more at www.synopsys.com.
ARM, AMBA, ACE, Artisan, big.LITTLE, Cortex, CoreLink, MPCore and POP are trademarks or registered trademarks of ARM Limited. Synopsys, Design Compiler, Discovery, Galaxy, and IC Compiler are trademarks or registered trademarks of Synopsys, Inc. registered in the United States and/or other countries. All other trademarks mentioned in this release are the intellectual property of their respective owners.
Safe Harbor Statement
This press release contains forward-looking statements within the meaning of Section 27A of the United States Securities Act of 1933 and Section 21E of the United States Securities Exchange Act of 1934, including statements regarding the expected availability and performance of Lynx technology plug-ins for the Synopsys Reference Implementations. These statements are based on current expectations and beliefs. Actual results could differ materially from those described by these statements due to risks and uncertainties including, but not limited to, unforeseen production or delivery delays, failure to perform as expected, product errors or defects and other risks as identified in the companies' respective filings with the U.S. Securities and Exchange Commission, including those described in the "Risk Factors" section of Synopsys' latest Quarterly Report on Form 10-Q.
SOURCE Synopsys, Inc.