BEEcube Will Be Exhibiting and Announcing New Product Line at the Design Automation Conference 2011

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May 18, 2011, 07:30 ET

FREMONT, Calif., May 18, 2011 /PRNewswire/ -- BEEcube will be exhibiting at the Design Automation Conference (DAC) from Monday, June 6 to Wednesday, June 8 at booth #2431 at the San Diego Convention Center in San Diego, CA. Exhibit hours are from 9:00am to 6:00pm.

BEEcube will be announcing an entirely new product line at DAC. This new offering will be targeting a wider audience of system level FPGA prototyping. "We believe our new offering will energize the entire FPGA prototyping market, by offering a unique set of capabilities and features, including mixed signal ADC/DAC capabilities," states Joseph Rothman, BEEcube's Sr. VP of Marketing and Business Development.

BEEcube will also be showing off its recently announced BEE4-W, a stackable full speed multi-FPGA based prototyping platform, integrated with ADC/DAC modules for mixed signal and digital communication designs for both commercial and defense oriented needs.

BEEcube will also be highlighting a number of new application base demonstrations including sharing its booth with the University of California San Diego' s Non-Volatile System Laboratory and Xilinx's university program.

BEEcube's demonstration at DAC will be highlighting a number of key FPGA verification/validation prototyping applications:

Using BEE4's optional FMC based HDMI card, attendees will see a live HD video processing based prototype, highlighting BEEcube's Sting I/O™ full-speed streaming capability and on-the-fly DRAM capture. Captured data streams are downloaded via Gigabit Ethernet, and analyzed on a remote workstation using industry-standard waveform viewers for low-level, RTL signal debugging. And within the same design remote-access of dual 2GB frame buffers in native frame format, which allows live video to be delayed, paused, or manipulated in real time; Showing off BEE4's uniquely simultaneous "full speed" RTL level and application level debug features.
LDPC (Low-Density Parity Check)– This well understood algorithm for linear error correcting code used for transmitting messages over nosy transmission channels will be demonstrated on the BEE4. Using the BEE4 this algorithm can actually be emulated and implemented, showing peak performance of nearly 700 Mbps in less then one hour to reach 10-10 BER (100 bit errors). Without the BEE4, simulation only techniques would take days.
Mixed-Signal (Digital and RF) Prototyping Platform, highlighting digital system RF prototyping of full speed "Adaptive Frequency Modulation," up to 3GHz using ADC and DAC modules of BEEcube's BEE4-W FPGA development platform.
10GB High Speed Ethernet interface communication on the BEE4, using our latest built-in IP found in BEEcube Platform Studio™ (BPS)

About BEEcube

BEEcube, a leading provider of advanced system-level FPGA prototyping platforms, was founded in 2006. Spinning out of the University of California, Berkeley, BEEcube's founders include the best academic minds in Silicon Valley and are credited with founding a number of leading companies, including Atheros Communications.

There are nearly 200 BEE systems deployed worldwide in major corporations and top universities. Corporations currently using BEE systems include: Xilinx, Microsoft, Oracle, Boeing, Hauwei, Lincoln Labs, Aerospace Corporation, and Thales Group. Leading universities include: University of California, Berkeley, Stanford University, Massachusetts Institute of Technology, Imperial College London, Barcelona Super Computing Center, Tokyo University, Tsinghua University, and Peking University.

For more information contact [email protected] or visit the website: www.beecube.com. Telephone: (510)252-1136. Facsimile: (888)700-8917. BEEcube's corporate headquarters is based at 39465 Paseo Padre Parkway, Suite 3700, Fremont, CA 94538.

BEEcube acknowledges trademarks or registered trademarks of other organizations for their respective products and services.

SOURCE BEEcube