"The Tensilica Design Contest highlights the critical need for high performance and low power processors for vision, deep learning and other DSP applications used in mobile, automotive and internet of things (IoT) applications," said Chris Rowen, CTO of the IP Group at Cadence. "The contest cultivates and enables continued innovation within the academic community by providing access to the most advanced tools in the industry for creating application-specific processors and their associated development tools."
The Cadence® Academic Network is aimed at promoting the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence. A knowledge network among selected universities, research institutes, industry advisors and Cadence facilitates the sharing of technology expertise in the verification, design and implementation of microelectronic systems.
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at http://www.cadence.com.
© 2016 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo, and Tensilica are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries.
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SOURCE Cadence Design Systems, Inc.