WILSONVILLE, Ore., Nov. 11, 2016 /PRNewswire/ -- Mentor Graphics Corporation (Nasdaq: MENT) today announced its new Tessent® DefectSim™ product, that measures the defect coverage of any test applied to an analog or mixed-signal circuit. This capability improves the quality and reliability of analog and mixed-signal circuits through the selection of more effective tests and reduces the cost of test by showing which tests do not increase coverage. Tessent DefectSim satisfies the growing defect-coverage measurement requirement for automotive ICs set by Tier1 automotive suppliers.
Tessent DefectSim works with Mentor's Eldo® and Questa® ADMS™ circuit simulators to measure the effects of opens, shorts, extreme variations, and user-defined defects modeled within a layout-extracted or schematic netlist. A number of techniques are used to reduce total simulation time by many orders of magnitude, compared to sequential simulation of every defect in a flat layout-extracted netlist, without reducing simulation accuracy or limiting the type of test. Among the techniques is a new statistical method called likelihood-weighted random sampling that minimizes the number of defects to simulate and more accurately indicates outgoing chip quality.
"In mixed-signal automotive ICs, about 80% of the defects found in returned ICs are in the analog circuitry. The quality of analog circuitry is traditionally guaranteed using functional tests while the fault coverage remains unknown. A few years ago, we identified several ways to improve defect coverage of analog tests but the main gap towards improvement was the absence of an automated fault simulation tool," said Wim Dobbelaere, director of test and product engineering at ON Semiconductor. "We had an extensive collaboration with Mentor during the development of Tessent DefectSim. We evaluated the tool on several automotive ICs and concluded it is a highly-automated and flexible solution that guides improvements in test and design-for-test techniques and allows us to measurably improve the defect coverage of analog tests."
"We used DefectSim to investigate a simpler, faster structural test for an analog circuit that we manufacture," said Peter Sarson, test development manager at the division Full Service Foundry, ams AG. "DefectSim showed us that the new test has defect coverage equal to that of our specification-based test, and now we only need to validate the new test in production. This tool paid for itself in one project."
Tessent DefectSim can also measure a circuit's tolerance to defects. Defect tolerance is a measure of a circuit's ability, in the presence of defects, to either continue to operate within acceptable operational limits or to transition into a safe state. This metric is very important in automotive applications as it directly relates to long term reliability.
"We're seeing a need for analog test automation from a growing portion of our customer base," said Steve Pateras, product marketing director at Mentor Graphics. "The automotive market has quickly expanded this need, making the unique automation provided by Tessent DefectSim a timely and valuable addition to our Tessent suite of test tools."
The Tessent DefectSim product is available now in Tessent release version 2016.3.
About Mentor Graphics
Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues in the last fiscal year of approximately $1.18 billion. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/
(Mentor Graphics, Mentor, Eldo, Questa, and Tessent are registered trademarks, and DefectSim is a trademark of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.)
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SOURCE Mentor Graphics Corporation