MUNICH, May 3, 2016 /PRNewswire/ -- Today at CDNLive EMEA, Cadence Design Systems, Inc. (NASDAQ: CDNS) unveiled the Allegro® 17.2-2016 portfolio, which enables a more predictable and shorter design cycle. The portfolio features comprehensive in-design inter-layer checking technology that minimizes design-check-redesign iterations and a new dynamic concurrent team design capability that accelerates product creation time by up to 50 percent. Utilizing material inlay fabrication techniques, these new capabilities can reduce material costs by up to 25 percent. In addition, embedded SigrityTM technology now ensures critical signals meet performance criteria and power integrity (PI) for PCB designers addressing power delivery and IR-drop issues efficiently, eliminating time-consuming iterations with PI experts. For more information on the Allegro technology portfolio, please visit http://www.cadence.com/news/allegro172.
The Allegro portfolio includes key advancements that minimize design iterations and lower overall cost for flex and rigid-flex designs commonly used in automotive, consumer electronics, computing, communications, mobile and wearable applications. These capabilities include:
- Rigid-Flex design enhancements that give designers the ability to specify multiple rigid and flex stack-ups in the same database. This stack-up-by-zone feature can also be used in rigid designs to create material inlay regions leveraging a mix of expensive and inexpensive materials, enabling reduction of material cost by up to 25 percent.
- Unique and comprehensive in-design inter-layer checks for flex and rigid-flex that saves manual effort and ensures all rules for advance flex designs are adhered to, avoiding many design-check-redesign iterations.
- PI for PCB designers that leverages Allegro and Sigrity technologies to provide faster, more reliable access to IR-drop analysis results, enabling PCB designers to efficiently meet power delivery network (PDN) design requirements.
- Interoperable Allegro and Sigrity technologies that provide an easy to use environment, which shortens design and verification time. This is achieved by avoiding unnecessary physical prototype iterations through improved route channel utilization using tabbed routing, new in-design backdrilling rules and efficient sharing of custom return path via structures optimized with Sigrity technology.
- New Native 3D engine that streamlines the system design process and provides improved visualization and collision detection to avoid unnecessary MCAD/ECAD iterations.
The Allegro portfolio now provides synchronous team design capability, which can shorten design time by up to 50 percent for dense designs and increase efficiency by enabling the team to design synchronously. This feature enables PCB designers to achieve maximum productivity by allowing up to five PCB designers to conduct real-time, concurrent PCB design work within the same design database, shortening time to route a dense design by up to 80 percent.
"Due to the nature of our business, flex designs are extremely critical to many of our products, specifically in the mobile and automotive space. The breadth and the depth of enhancements have the ability to significantly improve our PCB design productivity in designing for space-constrained applications," said Greg Bodi, director of System Engineering PCB Layout, Nvidia. "The new inter-layer check capability provides comprehensive in-design, real-time checks, which will save us significant time currently spent doing manual checks after layout is completed on advance flex and rigid-flex designs."
"The latest Allegro release provides many productivity and ease of use improvements," said Dave Elder, PCB Engineering manager at Tait Communications. "In-design inter-layer checks for flex and rigid-flex design is comprehensive and extensible, which can save us 20 to 25 percent time for rigid-flex designs. This will also allow us to retire some homegrown solutions we put in place."
"The new Allegro platform addresses many challenges faced by PCB designers on a daily basis," said Saugat Sen, vice president of R&D, PCB and IC Packaging Group at Cadence. "We continue to provide market-leading solutions with Allegro's extensive Rigid/Flex capabilities coupled with industry-leading power aware Sigrity SI/PI technology to reduce design cycle time for our customers' compact, high-performance products."
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at http://www.cadence.com.
© 2016 Cadence Design Systems, Inc. All rights reserved worldwide. Allegro, Cadence and the Cadence logo are registered trademarks and Sigrity is a trademark of Cadence Design Systems, Inc. in the United States and other countries.
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SOURCE Cadence Design Systems, Inc.