"In package integration of DRAM represents a massive leap forward in memory bandwidth for high end FPGA-enabled applications," said Kirk Saban, senior director of FPGA and SoC Product Management at Xilinx. "HBM integration in our industry leading devices provides a clear path to multi-terabit memory bandwidth and our acceleration enhanced technology will enable efficient heterogeneous computing for our customers' most demanding workloads and applications."
Based on the proven 16nm Virtex UltraScale+ FPGA family, which started sampling in 2015, the HBM-optimized Virtex UltraScale+ products offer the lowest-risk approach to HBM integration. The family is built using 3rd generation CoWoS technology—co-developed by TSMC and Xilinx and now the industry standard assembly for HBM integration.
Detailed device tables and product documentation is available on all four new devices at https://www.xilinx.com/products/silicon-devices/fpga/virtex-ultrascale-plus.html.
Xilinx is the leading provider of All Programmable FPGAs, SoCs, MPSoCs, and 3D ICs. Xilinx uniquely enables applications that are both software defined and hardware optimized – powering industry advancements in Cloud Computing, Embedded Vision, Industrial IoT, and 5G Wireless. For more information, visit www.xilinx.com.
Copyright 2016 Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.
Silvia E. Gianelli
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SOURCE Xilinx, Inc.